gcc/ChangeLog:
	* config/riscv/riscv.cc
	(riscv_file_end): Add .note.gnu.property.

libgcc/ChangeLog:
	* config/riscv/crti.S: Add lpad instructions.
	* config/riscv/crtn.S: Likewise.
	* config/riscv/save-restore.S: Likewise.
	* config/riscv/riscv-asm.h: Add GNU_PROPERTY for ZICFILP,
	ZICFISS.

Co-Developed-by: Jesse Huang <jesse.huang@sifive.com>

This patch is implemented according to the RISC-V CFI specification.
It supports the generation of shadow stack instructions in the prologue,
epilogue, non-local gotos, and unwinding.

RISC-V CFI SPEC: https://github.com/riscv/riscv-cfi



gcc/ChangeLog:
	* common/config/riscv/riscv-common.cc: Add ZICFISS ISA string.
	* config/riscv/predicates.md: New predicate x1x5_operand.
	* config/riscv/riscv.cc
	(riscv_expand_prologue): Insert shadow stack instructions.
	(riscv_expand_epilogue): Likewise.
	(riscv_for_each_saved_reg): Assign t0 or ra register for
	sspopchk instruction.
	(need_shadow_stack_push_pop_p): New function. Omit shadow
	stack operation on leaf function.
	* config/riscv/riscv.h
	(need_shadow_stack_push_pop_p): Define.
	* config/riscv/riscv.md: Add shadow stack patterns.
	(save_stack_nonlocal): Add shadow stack instructions for setjump.
	(restore_stack_nonlocal): Add shadow stack instructions for longjump.
	* config/riscv/riscv.opt (TARGET_ZICFISS): Define.

libgcc/ChangeLog:
	* config/riscv/linux-unwind.h: Include shadow-stack-unwind.h.
	* config/riscv/shadow-stack-unwind.h
	(_Unwind_Frames_Extra): Define.
	(_Unwind_Frames_Increment): Define.

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/ssp-1.c: New test.
	* gcc.target/riscv/ssp-2.c: New test.

Co-Developed-by: Greg McGary <gkm@rivosinc.com&gt;,>
			Kito Cheng <kito.cheng@gmail.com>

Fix __extenddfxf2:

  * Remove bogus denorm handling block which would never execute --
    the converted exp value is always positive as EXCESSX > EXCESSD.

  * Compute the whole significand in dl instead of doing part of it in
    ldl.

    * Mask off exponent from dl.l.upper so the denorm shift test
      works.

    * Insert the hidden one bit into dl.l.upper as needed.

Fix __truncxfdf2 denorm handling. All that is required is to shift the
significand right by the correct amount; it already has all of the
necessary bits set including the explicit one. Compute the shift
amount, then perform the wide shift across both elements of the
significand.

Fix __fixxfsi:

  * The value  was off by a factor of two as the significand contains
    32 bits, not 31 so we need to shift by one more than the equivalent
    code in __fixdfsi.

  * Simplify the code having realized that the lower 32 bits of the
    significand can never appear in the results.

Return positive qNaN instead of negative. For floats, qNaN is 0x7fff_ffff. For
doubles, qNaN is 0x7fff_ffff_ffff_ffff.

Return correctly signed zero on float and double divide underflow. This means
that Ld$underflow now expects d7 to contain the sign bit, just like the other
return paths.

libgcc/
	* config/m68k/fpgnulib.c (extenddfxf2): Simplify code by removing code
	that should never execute.  Fix denorm shift test and insert hidden bit
	as needed.
	(__truncxfdf2): Properly compue and shift the significant right.
	* config/m68k/lb1sf68.S (__fixxfsi): Correct shift counts and simplify.
	(QUIET_NAN): Make it a positive quiet NaN and fix return values to inject
	sign properly.

In the OpenRISC build we get the following warning:

    ld: warning: __modsi3_s.o: missing .note.GNU-stack section implies executable stack
    ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker

Fix this by adding a .note.GNU-stack to indicate the stack does not need to be
executable for the lib1funcs.

Note, this is also needed for the upcoming glibc 2.41.

libgcc/
	* config/or1k/lib1funcs.S: Add .note.GNU-stack section on linux.

2024 -> 2025

This patch adds __flashx as a new named address space that allocates
objects in .progmemx.data.  The handling is mostly the same or similar
to that of 24-bit space __memx, except that the asm routines are
simpler and more efficient.  Loads are emit inline when ELPMX or
LPMX is available.  The address space uses a 24-bit addresses even
on devices with a program memory size of 64 KiB or less.

	PR target/118001
gcc/
	* doc/extend.texi (AVR Named Address Spaces): Document __flashx.
	* config/avr/avr.h (ADDR_SPACE_FLASHX): New enum value.
	* config/avr/avr-protos.h (avr_out_fload, avr_mem_flashx_p)
	(avr_fload_libgcc_p, avr_load_libgcc_mem_p)
	(avr_load_libgcc_insn_p): New.
	* config/avr/avr.cc (avr_addrspace): Add ADDR_SPACE_FLASHX.
	(avr_decl_flashx_p, avr_mem_flashx_p, avr_fload_libgcc_p)
	(avr_load_libgcc_mem_p, avr_load_libgcc_insn_p, avr_out_fload):
	New functions.
	(avr_adjust_insn_length) [ADJUST_LEN_FLOAD]: Handle case.
	(avr_progmem_p) [avr_decl_flashx_p]: return 2.
	(avr_addr_space_legitimate_address_p) [ADDR_SPACE_FLASHX]:
	Has same behavior like ADDR_SPACE_MEMX.
	(avr_addr_space_convert): Use pointer sizes rather then ASes.
	(avr_addr_space_contains): New function.
	(avr_convert_to_type): Use it.
	(avr_emit_cpymemhi): Handle ADDR_SPACE_FLASHX.
	* config/avr/avr.md (adjust_len) <fload>: New attr value.
	(gen_load<mode>_libgcc): Renamed from load<mode>_libgcc.
	(xload8<mode>_A): Iterate over MOVMODE rather than over ALL1.
	(fxmov<mode>_A): New from xloadv<mode>_A.
	(xmov<mode>_8): New from xload<mode>_A.
	(fmov<mode>): New insns.
	(fxload<mode>_A): New from xload<mode>_A.
	(fxload_<mode>_libgcc): New from xload_<mode>_libgcc.
	(*fxload_<mode>_libgcc): New from *xload_<mode>_libgcc.
	(mov<mode>) [avr_mem_flashx_p]: Hande ADDR_SPACE_FLASHX.
	(cpymemx_<mode>): Make sure the address space is not lost
	when splitting.
	(*cpymemx_<mode>) [ADDR_SPACE_FLASHX]: Use __movmemf_<mode> for asm.
	(*ashlqi.1.zextpsi_split): New combine pattern.
	* config/avr/predicates.md (nox_general_operand): Don't match
	when avr_mem_flashx_p is true.
	* config/avr/avr-passes.cc (AVR_LdSt_Props):
	ADDR_SPACE_FLASHX has no post_inc.

gcc/testsuite/
	* gcc.target/avr/torture/addr-space-1.h [AVR_HAVE_ELPM]:
	Use a function to bump .progmemx.data to a high address.
	* gcc.target/avr/torture/addr-space-2.h: Same.
	* gcc.target/avr/torture/addr-space-1-fx.c: New test.
	* gcc.target/avr/torture/addr-space-2-fx.c: New test.

libgcc/
	* config/avr/t-avr (LIB1ASMFUNCS): Add _fload_1, _fload_2,
	_fload_3, _fload_4, _movmemf.
	* config/avr/lib1funcs.S (.branch_plus): New .macro.
	(__xload_1, __xload_2, __xload_3, __xload_4): When the address is
	located in flash, then forward to...
	(__fload_1, __fload_2, __fload_3, __fload_4): ...these new
	functions, respectively.
	(__movmemx_hi): When the address is located in flash, forward to...
	(__movmemf_hi): ...this new function.

Unlike crtoffload{begin,end}.o which just define some symbols at the start/end
of the various .gnu.offload* sections, crtoffloadtable.o contains
const void *const __OFFLOAD_TABLE__[]
  __attribute__ ((__visibility__ ("hidden"))) =
{
  &__offload_func_table, &__offload_funcs_end,
  &__offload_var_table, &__offload_vars_end,
  &__offload_ind_func_table, &__offload_ind_funcs_end,
};
The problem is that linking this into PIEs or shared libraries doesn't
work when it is compiled without -fpic/-fpie - __OFFLOAD_TABLE__ for non-PIC
code is put into .rodata section, but it really needs relocations, so for
PIC it should go into .data.rel.ro/.data.rel.ro.local.
As I think we don't want .data.rel.ro section in non-PIE binaries, this patch
follows the path of e.g. crtbegin.o vs. crtbeginS.o and adds crtoffloadtableS.o
next to crtoffloadtable.o, where crtoffloadtableS.o is compiled with -fpic.

2024-11-30  Jakub Jelinek  <jakub@redhat.com>

	PR libgomp/117851
gcc/
	* lto-wrapper.cc (find_crtoffloadtable): Add PIE_OR_SHARED argument,
	search for crtoffloadtableS.o rather than crtoffloadtable.o if
	true.
	(run_gcc): Add pie_or_shared variable.  If OPT_pie or OPT_shared or
	OPT_static_pie is seen, set pie_or_shared to true, if OPT_no_pie is
	seen, set pie_or_shared to false.  Pass it to find_crtoffloadtable.
libgcc/
	* configure.ac (extra_parts): Add crtoffloadtableS.o.
	* Makefile.in (crtoffloadtableS$(objext)): New goal.
	* configure: Regenerated.

Including the "arm_acle.h" header in aarch64-unwind.h requires
stdint.h to be present and it may not be available during the
first stage of cross-compilation of GCC.

When cross-building GCC for the aarch64-none-linux-gnu target
(on any supporting host) using the 3-stage bootstrap build
process when we build native compiler from source, libgcc fails
to compile due to missing header that has not been installed yet.

This could be worked around but it's better to fix the issue.

libgcc/ChangeLog:

	* config/aarch64/aarch64-unwind.h (_CHKFEAT_GCS): Add.

gcc/ChangeLog:
	* config/aarch64/arm_acle.h (_CHKFEAT_GCS): New.

libgcc/ChangeLog:

	* config/aarch64/aarch64-unwind.h (_Unwind_Frames_Extra): Update.
	(_Unwind_Frames_Increment): Update

Reviewed-by: Richard Sandiford <richard.sandiford@arm.com>

nios2 target support in GCC was deprecated in GCC 14 as the
architecture has been EOL'ed by the vendor.  This patch removes the
entire port for GCC 15

There are still references to "nios2" in libffi and libgo.  Since those
libraries are imported into the gcc sources from master copies maintained
by other projects, those will need to be addressed elsewhere.

ChangeLog:
	* MAINTAINERS: Remove references to nios2.
	* configure.ac: Likewise.
	* configure: Regenerated.

config/ChangeLog:
	* mt-nios2-elf: Deleted.

contrib/ChangeLog:
	* config-list.mk: Remove references to Nios II.

gcc/ChangeLog:
	* common/config/nios2/*: Delete entire directory.
	* config/nios2/*: Delete entire directory.
	* config.gcc: Remove references to nios2.
	* configure.ac: Likewise.
	* doc/extend.texi: Likewise.
	* doc/install.texi: Likewise.
	* doc/invoke.texi: Likewise.
	* doc/md.texi: Likewise.
	* regenerate-opt-urls.py: Likewise.
	* config.in: Regenerated.
	* configure: Regenerated.

gcc/testsuite/ChangeLog:
	* g++.target/nios2/*: Delete entire directory.
	* gcc.target/nios2/*: Delete entire directory.
	* g++.dg/cpp0x/constexpr-rom.C: Remove refences to nios2.
	* g++.old-deja/g++.jason/thunk3.C: Likewise.
	* gcc.c-torture/execute/20101011-1.c: Likewise.
	* gcc.c-torture/execute/pr47237.c: Likewise.
	* gcc.dg/20020312-2.c: Likewise.
	* gcc.dg/20021029-1.c: Likewise.
	* gcc.dg/debug/btf/btf-datasec-1.c: Likewise.
	* gcc.dg/ifcvt-4.c: Likewise.
	* gcc.dg/stack-usage-1.c: Likewise.
	* gcc.dg/struct-by-value-1.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
	* lib/target-supports.exp: Likewise.

libgcc/ChangeLog:
	* config/nios2/*: Delete entire directory.
	* config.host: Remove refences to nios2.
	* unwind-dw2-fde-dip.c: Likewise.

mips16.S was missing since
commit 29b74545
Date:   Thu Jun 1 10:14:24 2023 +0800

    MIPS: Add speculation_barrier support

Without mips16.S included, some symbols will miss for mips16, and
so some software will fail to build.

libgcc/ChangeLog:

	* config/mips/lib1funcs.S: Includes mips16.S.

libgcc/config/avr/libf7/
	PR target/115419
	* libf7.c (f7_get_double): Round tie breaks to even LSB.

Much like AT_HWCAP is already provided in case the platform headers
don't have the value (yet).

libgcc/

	* config/aarch64/cpuinfo.c: Provide AT_HWCAP2.

This patch adds missing assembly directives to the CMSE library wrapper to call
functions with attribute cmse_nonsecure_call.  Without the .type directive the
linker will fail to produce the correct veneer if a call to this wrapper
function is to far from the wrapper itself.  The .size was added for
completeness, though we don't necessarily have a usecase for it.

libgcc/ChangeLog:

	PR target/115360
	* config/arm/cmse_nonsecure_call.S: Add .type and .size directives.

Adding stub '_Unwind_Backtrace', '_Unwind_GetIPInfo' functions is necessary
for linking libbacktrace, as a normal (non-'LIBGFOR_MINIMAL') configuration
of libgfortran wants to do, for example.

The file 'libgcc/config/nvptx/unwind-nvptx.c' is copied from
'libgcc/config/gcn/unwind-gcn.c'.

libgcc/ChangeLog:

	* config/nvptx/t-nvptx: Add unwind-nvptx.c.
	* config/nvptx/unwind-nvptx.c: New file.

Co-authored-by: Andrew Stubbs <ams@gcc.gnu.org>

This extends commit d9c90c82
"nvptx target: Global constructor, destructor support, via nvptx-tools 'ld'"
for offloading.

	libgcc/
	* config/nvptx/gbl-ctors.c ["mgomp"]
	(__do_global_ctors__entry__mgomp)
	(__do_global_dtors__entry__mgomp): New.
	[!"mgomp"] (__do_global_ctors__entry, __do_global_dtors__entry):
	New.
	libgomp/
	* plugin/plugin-nvptx.c (nvptx_do_global_cdtors): New.
	(nvptx_close_device, GOMP_OFFLOAD_load_image)
	(GOMP_OFFLOAD_unload_image): Call it.

The CPU features initialization code uses CPUID registers (rather than
HWCAP).  The equality comparisons it uses are incorrect: for example FEAT_SVE
is not set if SVE2 is available.  Using HWCAPs for these is both simpler and
correct.  The initialization must also be done atomically to avoid multiple
threads causing corruption due to non-atomic RMW accesses to the global.

libgcc:
	PR target/115342
	* config/aarch64/cpuinfo.c (__init_cpu_features_constructor):
	Use HWCAP where possible.  Use atomic write for initialization.
	Fix FEAT_PREDRES comparison.
	(__init_cpu_features_resolver): Use atomic load for correct
	initialization.
	(__init_cpu_features): Likewise.

	PR target/115317
libgcc/config/avr/libf7/
	* libf7-asm.sx (__isinf): Map -Inf to -1.

gcc/testsuite/
	* gcc.target/avr/torture/pr115317-isinf.c: New test.

The function attributes 'constructor', 'destructor', and 'init_priority' now
work, as do the C++ features making use of this.  Test cases with effective
target 'global_constructor' and 'init_priority' now generally work, and
'check-gcc-c++' test results greatly improve; no more
"sorry, unimplemented: global constructors not supported on this target".

For proper execution test results, this depends on
<https://github.com/SourceryTools/nvptx-tools/commit/96f8fc59a757767b9e98157d95c21e9fef22a93b>
"ld: Global constructor/destructor support".

	gcc/
	* config/nvptx/nvptx.h: Configure global constructor, destructor
	support.
	gcc/testsuite/
	* gcc.dg/no_profile_instrument_function-attr-1.c: GCC/nvptx is
	'NO_DOT_IN_LABEL' but not 'NO_DOLLAR_IN_LABEL', so '$' may apper
	in identifiers.
	* lib/target-supports.exp
	(check_effective_target_global_constructor): Enable for nvptx.
	libgcc/
	* config/nvptx/crt0.c (__gbl_ctors): New weak function.
	(__main): Invoke it.
	* config/nvptx/gbl-ctors.c: New.
	* config/nvptx/t-nvptx: Configure global constructor, destructor
	support.

Since r9-4728 the powerpcspe support had been removed, this
follow-up patch is to remove the remaining pieces in libgcc.

libgcc/ChangeLog:

	* config.host: Remove powerpc-*-eabispe* support.
	* config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Remove
	__SPE__ code.
	* config/rs6000/t-savresfgpr (LIB2ADD_ST): Remove e500crtres32gpr.S,
	e500crtres32gpr.S, e500crtsav64gpr.S, e500crtsav64gprctr.S,
	e500crtres64gpr.S, e500crtsav32gpr.S, e500crtsavg32gpr.S,
	e500crtres64gprctr.S, e500crtsavg64gprctr.S, e500crtresx32gpr.S,
	e500crtrest32gpr.S, e500crtrest64gpr.S and e500crtresx64gpr.S.
	* config/rs6000/e500crtres32gpr.S: Remove.
	* config/rs6000/e500crtres64gpr.S: Remove.
	* config/rs6000/e500crtres64gprctr.S: Remove.
	* config/rs6000/e500crtrest32gpr.S: Remove.
	* config/rs6000/e500crtrest64gpr.S: Remove.
	* config/rs6000/e500crtresx32gpr.S: Remove.
	* config/rs6000/e500crtresx64gpr.S: Remove.
	* config/rs6000/e500crtsav32gpr.S: Remove.
	* config/rs6000/e500crtsav64gpr.S: Remove.
	* config/rs6000/e500crtsav64gprctr.S: Remove.
	* config/rs6000/e500crtsavg32gpr.S: Remove.
	* config/rs6000/e500crtsavg64gpr.S: Remove.
	* config/rs6000/e500crtsavg64gprctr.S: Remove.

The libgcc implementation of __clzhi2 can be tweaked by
one cycle in some situations by re-arranging the instructions.
It also reduces the WCET by 1 cycle.

libgcc/
	PR target/115065
	* config/avr/lib1funcs.S (__clzhi2): Tweak.

Implement __powisf2 in assembly.

	PR target/114981
libgcc/
	* config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add _powisf2.
	(LIB1ASMFUNCS) [!avrtiny]: Add _powif.
	* config/avr/lib1funcs.S (mov4): New .macro.
	(L_powif, __powisf2) [!avrtiny]: New module and function.

gcc/testsuite/
	* gcc.target/avr/pr114981-powif.c: New test.