When you're not regularly exposed to this warning, it is
easy to be misled by its wording, believing that there's
something else in the function that stops it from being
inlined, something other than the lack of also being
*declared* inline.  Also, clang does not warn.

It's just a warning: without the inline directive, there has
to be a secondary reason for the function to be inlined,
other than the always_inline attribute, a reason that may be
in effect despite the warning.

Whenever the text is quoted in inline-related bugzilla
entries, there seems to often have been an initial step of
confusion that has to be cleared, for example in PR55830.
A file in the powerpc-specific parts of the test-suite,
gcc.target/powerpc/vec-extract-v16qiu-v2.h, has a comment
and seems to be another example, and I testify as the
first-hand third "experience".  The wording has been the
same since the warning was added.

Let's just tweak the wording, adding the cause, so that the
reason for the warning is clearer.  This hopefully stops the
user from immediately asking "'Might'?  Because why?"  and
then going off looking at the function body - or grepping
the gcc source or documentation, or enter a bug-report
subsequently closed as resolved/invalid.

Since the message is only appended with additional
information, no test-case actually required adjustment.
I still changed them, so the message is covered.

gcc:
	* cgraphunit.cc (process_function_and_variable_attributes): Tweak
	the warning for an attribute-always_inline without inline declaration.

gcc/testsuite:
	* g++.dg/Wattributes-3.C: Adjust expected warning.
	* gcc.dg/fail_always_inline.c: Ditto.

Currently the DECL_STRUCT_FUNCTION for a declaration is always
reconstructed from scratch. This causes issues though, as some fields
used by other parts of the compiler (in this case, specifically
'function_{start,end}_locus') are then not correctly initialised. This
patch makes sure that these fields are also read and written.

	PR c++/113580

gcc/cp/ChangeLog:

	* module.cc (struct post_process_data): Create.
	(trees_in::post_decls): Use.
	(trees_in::post_process): Return entire vector at once.
	Change overload to take post_process_data instead of tree.
	(trees_out::write_function_def): Write needed flags from
	DECL_STRUCT_FUNCTION.
	(trees_in::read_function_def): Read them and pass to
	post_process.
	(module_state::read_cluster): Write flags into cfun.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/pr113580_a.C: New test.
	* g++.dg/modules/pr113580_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

Add RTL tests, for RV64 and RV32 where appropriate, corresponding to the
existing cset-sext.c tests.  They have been produced from RTL code as at
the entry of the "ce1" pass for the respective cset-sext.c tests built
at -O3.

	gcc/testsuite/
	* gcc.target/riscv/cset-sext-rtl.c: New file.
	* gcc.target/riscv/cset-sext-rtl32.c: New file.
	* gcc.target/riscv/cset-sext-sfb-rtl.c: New file.
	* gcc.target/riscv/cset-sext-sfb-rtl32.c: New file.
	* gcc.target/riscv/cset-sext-thead-rtl.c: New file.
	* gcc.target/riscv/cset-sext-ventana-rtl.c: New file.
	* gcc.target/riscv/cset-sext-zicond-rtl.c: New file.
	* gcc.target/riscv/cset-sext-zicond-rtl32.c: New file.

Add a pair of RTL tests, for RV64 and RV32 respectively, corresponding
to the existing pr105314.c test.  They have been produced from RTL code
as at the entry of the "ce1" pass for pr105314.c compiled at -O3.

	gcc/testsuite/
	* gcc.target/riscv/pr105314-rtl.c: New file.
	* gcc.target/riscv/pr105314-rtl32.c: New file.

Verify that if-conversion succeeded through noce_try_store_flag_mask, as
per PR rtl-optimization/105314, tightening the test case and making it
explicit.

	gcc/testsuite/
	* gcc.target/riscv/pr105314.c: Scan the RTL "ce1" pass too.

The optimization levels pr105314.c is iterated over are needlessly
overridden with "-O2", limiting the coverage of the test case to that
level, perhaps with additional options the original optimization level
has been supplied with.  We could prevent the extra iterations other
than "-O2" from being run, but the transformation made by if-conversion
is also expected to happen at other optimization levels, so include them
all, and also make sure no reverse-condition branch appears in output,
moving the `dg-final' command to the bottom, as with most test cases.

	gcc/testsuite/
	* gcc.target/riscv/pr105314.c: Replace `dg-options' command with
	`dg-skip-if'.  Also reject "bne" with `dg-final'.

init_all_optabs initializes > 10000 patterns for riscv targets.  This
leads to pathological situations in dataflow analysis (which can occur
with many adjacent stores).
To alleviate this this patch makes genopinit split the init_all_optabs
function into several init_optabs_xx functions that each initialize 1000
patterns.

With this change insn-opinit.cc's compilation time is reduced from 4+
minutes to 1:30 and memory consumption decreases from 1.2G to 630M.

gcc/ChangeLog:

	PR other/113575

	* genopinit.cc (main): Split init_all_optabs into functions
	of 1000 patterns each.

This patch improves the location accuracy of parameters and fixes bugs
in parameter checking in M2Check.  It also corrects the location
of constant declarations.

gcc/m2/ChangeLog:

	* gm2-compiler/M2Check.mod (dumpIndice): New procedure.
	(dumpIndex): New procedure.
	(dumptInfo): New procedure.
	(buildError4): Add comment and pass formal and actual to
	MetaError4.  Improve text describing error.
	(buildError2): Generate different error descriptions for
	the three error kinds.
	(checkConstMeta): Add block comment.  Add more meta checks
	and call doCheckPair to complete string const checking.
	Add tinfo parameter.
	(checkConstEquivalence): Add tinfo parameter.
	* gm2-compiler/M2GCCDeclare.mod (PrintVerboseFromList):
	Print the length of a const string.
	* gm2-compiler/M2GenGCC.mod (CodeParam): Remove parameters
	op1, op2 and op3.
	(doParam): Add paramtok parameter.  Use paramtok instead rather
	than CurrentQuadToken.
	(CodeParam): Rewrite.
	* gm2-compiler/M2Quads.mod (CheckProcedureParameters):
	Add comments explaining that const strings are not checked
	in M2Quads.mod.
	(FailParameter): Use MetaErrorT2 with tokpos rather than
	MetaError2.
	(doBuildBinaryOp): Assign OldPos and OperatorPos before the
	IF block.
	* gm2-compiler/SymbolTable.mod (PutConstString): Add call to
	InitWhereDeclaredTok.

gcc/testsuite/ChangeLog:

	* gm2/pim/fail/badpointer4.mod: New test.
	* gm2/pim/fail/strconst.def: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

The following avoids registering unsupported GCN offload devices
when iterating over available ones.  With a Zen4 desktop CPU
you will have an IGPU (unspported) which will otherwise be made
available.  This causes testcases like
libgomp.c-c++-common/non-rect-loop-1.c which iterate over all
decives to FAIL.

libgomp/
	* plugin/plugin-gcn.c (suitable_hsa_agent_p): Filter out
	agents with unsupported ISA.

The following makes the existing architecture support check work
instead of being optimized away (enum vs. -1).  This avoids
later asserts when we assume such devices are never actually
used.

libgomp/
	* plugin/plugin-gcn.c
	(EF_AMDGPU_MACH::EF_AMDGPU_MACH_UNSUPPORTED): Add.
	(isa_code): Return that instead of -1.
	(GOMP_OFFLOAD_init_device): Adjust.

gcc/ChangeLog:

	* config.gcc (amdgcn-*-*): Add gfx1030 and gfx1100 to
	TM_MULTILIB_CONFIG.
	* doc/install.texi (Configuration amdgcn-*-*): Mention gfx1030/gfx1100.
	* doc/invoke.texi (AMD GCN Options): Add gfx1030 and gfx1100 to
	-march/-mtune.

libgomp/ChangeLog:

	* testsuite/libgomp.c/declare-variant-4.h: Add variant functions
	for gfx1030 and gfx1100.
	* testsuite/libgomp.c/declare-variant-4-gfx1030.c: New test.
	* testsuite/libgomp.c/declare-variant-4-gfx1100.c: New test.

Signed-off-by: Tobias Burnus <tburnus@baylibre.com>

This is enough to get gfx1030 and gfx1100 working; there are still some test
failures to investigate, and probably some tuning to do.

gcc/ChangeLog:

	* config/gcn/gcn-opts.h (TARGET_PACKED_WORK_ITEMS): Add TARGET_RDNA3.
	* config/gcn/gcn-valu.md (all_convert): New iterator.
	(<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>): New
	define_expand, and rename the old one to ...
	(*<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>_sdwa<exec>): ... this.
	(extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>): Likewise, to ...
	(extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>_sdwa<exec>): .. this.
	(*<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>_shift<exec>): New.
	* config/gcn/gcn.cc (gcn_global_address_p): Use "offsetbits" correctly.
	(gcn_hsa_declare_function_name): Update the vgpr counting for gfx1100.
	* config/gcn/gcn.md (<u>mulhisi3): Disable on RDNA3.
	(<u>mulqihi3_scalar): Likewise.

libgcc/ChangeLog:

	* config/gcn/amdgcn_veclib.h (CDNA3_PLUS): Handle RDNA3.

libgomp/ChangeLog:

	* config/gcn/time.c (RTC_TICKS): Configure RDNA3.
	(omp_get_wtime): Add RDNA3-compatible variant.
	* plugin/plugin-gcn.c (max_isa_vgprs): Tune for gfx1030 and gfx1100.

Signed-off-by: Andrew Stubbs <ams@baylibre.com>

Static data members marked 'inline' should be emitted in TUs where they
are ODR-used.  We need to make sure that inlines imported from modules
are correctly added to the 'pending_statics' map so that they get
emitted if needed, otherwise the attached testcase fails to link.

	PR c++/112899

gcc/cp/ChangeLog:

	* cp-tree.h (note_variable_template_instantiation): Rename to...
	(note_vague_linkage_variable): ...this.
	* decl2.cc (note_variable_template_instantiation): Rename to...
	(note_vague_linkage_variable): ...this.
	* pt.cc (instantiate_decl): Rename usage of above function.
	* module.cc (trees_in::read_var_def): Remember pending statics
	that we stream in.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/init-4_a.C: New test.
	* g++.dg/modules/init-4_b.C: New test.
	* g++.dg/modules/init-6_a.H: New test.
	* g++.dg/modules/init-6_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Patrick Palka <ppalka@redhat.com>
Reviewed-by: Jason Merrill <jason@redhat.com>

We can end up creating ADDR_EXPRs of non-addressable entities during
for example vectorization.  The following plugs this in data-ref
analysis when that would create such invalid ADDR_EXPR as part of
analyzing the ref structure.

	PR tree-optimization/113602
	* tree-data-ref.cc (dr_analyze_innermost): Fail when
	the base object isn't addressable.

	* gcc.dg/pr113602.c: New testcase.

Since LLVM commit 082f87c9d418 (Pull Req. #79038; will become LLVM 18)
  "[AMDGPU] Change default AMDHSA Code Object version to 5"
the default - when no --amdhsa-code-object-version= is used - was bumped.

Using --amdhsa-code-object-version=5 is supported (with unknown limitations)
since LLVM 14. GCC required for proper support at least LLVM 13.0.1 such
that explicitly using COV5 is not possible.

Unfortunately, the COV number matters for debugging ("-g") as mkoffload.cc
extracts debugging data from the host's object file and writes into an
an AMD GPU object file it creates. And all object files linked together
must have the same ABI version.

gcc/ChangeLog:

	* config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): New; creates the
	"--amdhsa-code-object-version=" argument.
	(ASM_SPEC): Use it; replace previous version of it.

Signed-off-by: Tobias Burnus <tburnus@baylibre.com>

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Refine some codes.
	(pre_vsetvl::emit_vsetvl): Ditto.

For below pattern, can be treated as a simple move because floating point
and vector share a common register on loongarch64.

(set (reg/v:SF 32 $f0 [orig:93 res ] [93])
      (vec_select:SF (reg:V8SF 32 $f0 [115])
          (parallel [
                  (const_int 0 [0])
              ])))

gcc/ChangeLog:

	* config/loongarch/lasx.md (vec_extract<mode>_0):
	New define_insn_and_split patten.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vect-extract.c: New test.

Define LOGICAL_OP_NON_SHORT_CIRCUIT as 0, for a short-circuit branch, use the
short-circuit operation instead of the non-short-circuit operation.

SPEC2017 performance evaluation shows 1% performance improvement for fprate
GEOMEAN and no obvious regression for others. Especially, 526.blender_r +10.6%
on 3A6000.

This modification will introduce the following FAIL items:

FAIL: gcc.dg/tree-ssa/copy-headers-8.c scan-tree-dump-times ch2 "Conditional combines static and invariant" 1
FAIL: gcc.dg/tree-ssa/copy-headers-8.c scan-tree-dump-times ch2 "Will duplicate bb" 2
FAIL: gcc.dg/tree-ssa/update-threading.c scan-tree-dump-times optimized "Invalid sum" 0

gcc/ChangeLog:

	* config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/short-circuit.c: New test.

gcc/testsuite/ChangeLog:

	* gcc.dg/signbit-2.c: Added additional "-mlsx" compilation options.
	* gfortran.dg/graphite/vect-pr40979.f90: Dito.
	* gfortran.dg/vect/fast-math-mgrid-resid.f: Dito.

We found that in the spec17 521.wrf program, some loop invariant code generated
from single-precision floating-point approximate division calculation failed to
propose a loop. This is because the pseudo-register that stores the
intermediate temporary calculation results is rewritten in the implementation
of single-precision floating-point approximate division, failing to propose
invariants in the loop2_invariant pass. To this end, the intermediate temporary
calculation results are stored in new pseudo-registers without destroying the
read-write dependency, so that they could be recognized as loop invariants in
the loop2_invariant pass.
After optimization, the number of instructions of 521.wrf is reduced by 0.18%
compared with before optimization (1716612948501 -> 1713471771364).

gcc/ChangeLog:

	* config/loongarch/loongarch.cc (loongarch_emit_swdivsf): Adjust.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/invariant-recip.c: New test.

The 2 loops in octfapg_universe can and will be vectorized now
after r14-333-g6d4b59a9356ac4 on targets that support multiplication
in the long type. But the testcase does not check vect_long_mult for
that, so this patch corrects that error and now the testcase passes correctly
on aarch64-linux-gnu (with and without SVE).

Built and tested on aarch64-linux-gnu (with and without SVE).

gcc/testsuite/ChangeLog:

	PR testsuite/109705
	* gcc.dg/vect/pr25413a.c: Expect 1 vectorized loops for !vect_long_mult
	and 2 for vect_long_mult.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

This patch fixes the recent noticed bug in RV32 glibc.

We incorrectly deleted a vsetvl:

        ...
	and	a4,a4,a3
	vmv.v.i	v1,0                 ---> Missed vsetvl cause illegal instruction report.
	vse8.v	v1,0(a5)

The root cause the laterin in LCM is incorrect.

      BB 358:
        avloc: n_bits = 2, set = {}
        kill: n_bits = 2, set = {}
        antloc: n_bits = 2, set = {}
        transp: n_bits = 2, set = {}
        avin: n_bits = 2, set = {}
        avout: n_bits = 2, set = {}
        del: n_bits = 2, set = {}

cause LCM let BB 360 delete the vsetvl:

      BB 360:
        avloc: n_bits = 2, set = {}
        kill: n_bits = 2, set = {}
        antloc: n_bits = 2, set = {}
        transp: n_bits = 2, set = {0 1 }
        avin: n_bits = 2, set = {}
        avout: n_bits = 2, set = {}
        del: n_bits = 2, set = {1}

Also, remove unknown vsetvl info into local computation since it is unnecessary.

Tested on both RV32/RV64 no regression.

	PR target/113469

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix bug.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr113469.c: New test.

The problem here is we don't check the return value of exact_log2
and always use that result as shifter. This fixes the issue by avoiding
the shift if the value was `-1` (which means the value was not exact a power of 2);
in this case we could either check if the values was equal to -1 or not equal to because
we then assign -1 to shift if the constant value was not equal. I chose `!=` as
it seemed to be more obvious of what the code is doing.

Committed as obvious after a build/test for aarch64-linux-gnu.

gcc/ChangeLog:

	PR target/100212
	* config/aarch64/aarch64.cc (aarch64_classify_index): Avoid
	undefined shift after the call to exact_log2.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

The following testcase reduced from GDB is miscompiled starting with
r14-5503 PR112427 change.
The problem is in the build_m_component_ref hunk, which changed
-      datum = fold_build_pointer_plus (fold_convert (ptype, datum), component);
+      datum = cp_convert (ptype, datum, complain);
+      if (!processing_template_decl)
+       datum = build2 (POINTER_PLUS_EXPR, ptype,
+                       datum, convert_to_ptrofftype (component));
+      datum = cp_fully_fold (datum);
Component is e, (sizetype) e is 16, offset of c inside of C.
ptype is A *, pointer to type of C::c and datum is &d.
Now, previously the above created ((A *) &d) p+ (sizetype) e which is correct,
but in the new code cp_convert sees that C has A as base class and
instead of returning (A *) &d, it returns &d.D.2800 where D.2800 is
the FIELD_DECL for the A base at offset 8 into C.
So, instead of computing ((A *) &d) p+ (sizetype) e it computes
&d.D.2800 p+ (sizetype) e, which is ((A *) &d) p+ 24.

The following patch fixes it by using convert instead of cp_convert which
eventually calls build_nop (ptype, datum).

2024-01-26  Jakub Jelinek  <jakub@redhat.com>

	PR c++/113599
	* typeck2.cc (build_m_component_ref): Use convert instead of
	cp_convert for pointer conversion.

	* g++.dg/expr/ptrmem11.C: New test.

Here AGGREGATE_TYPE_P includes pointers to member functions, which is not
what we want.  Instead we should use class||array, as elsewhere in the
function.

	PR c++/113598

gcc/cp/ChangeLog:

	* init.cc (build_vec_init): Don't use {} for PMF.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/initlist-pmf2.C: New test.

Here we end up with an initializer_list of 'aa', a type with a non-trivial
destructor, and need to destroy it.  The code called
build_special_member_call for cleanups, but that doesn't work for arrays, so
use cxx_maybe_build_cleanup instead.  Let's go ahead and do that
everywhere that has been calling the destructor directly.

	PR c++/109227

gcc/cp/ChangeLog:

	* coroutines.cc (build_co_await): Use cxx_maybe_build_cleanup.
	(build_actor_fn, process_conditional, maybe_promote_temps)
	(morph_fn_to_coro): Likewise.
	(expand_one_await_expression): Use build_cleanup.

gcc/testsuite/ChangeLog:

	* g++.dg/coroutines/co-await-initlist2.C: New test.

The J constraint can invoke undefined behavior due to it taking the
negative of the ival if ival was HWI_MIN. The fix is simple as casting
to `unsigned HOST_WIDE_INT` before doing the negative of it. This
does that.

Committed as obvious after build/test for aarch64-linux-gnu.

gcc/ChangeLog:

	PR target/100204
	* config/aarch64/constraints.md (J): Cast to `unsigned HOST_WIDE_INT`
	before taking the negative of it.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

My recent patch for PR113356 results in failure asm-flag-1.c test on arm.
After the patch LRA treats asm operand pseudos as general regs.  There
are too many such operands and LRA can not assign hard regs to all
operand pseudos.  Actually we should not assign hard regs to the
operand pseudo at all.  The following patch fixes this.

gcc/ChangeLog:

	PR target/113526
	* lra-constraints.cc (curr_insn_transform): Change class even for
	spilled pseudo successfully matched with with NO_REGS.

	* MAINTAINERS: Update my work email address.

gcc/
	PR target/113601
	* config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start.

Recent commit introduced a conditional branch in eh_return epilogues
that is not compatible with speculation tracking:

  commit 426fddcb
  Author:     Szabolcs Nagy <szabolcs.nagy@arm.com>
  CommitDate: 2023-11-27 15:52:48 +0000

  aarch64: Use br instead of ret for eh_return

Refactor the compare zero and jump pattern and use it to fix the issue.

gcc/ChangeLog:

	PR target/112987
	* config/aarch64/aarch64.cc (aarch64_gen_compare_zero_and_branch): New.
	(aarch64_expand_epilogue): Use the new function.
	(aarch64_split_compare_and_swap): Likewise.
	(aarch64_split_atomic_op): Likewise.

This patch adds four modula-2 testcases to the regression testsuite.
The project example stresses INC/DEC and range checking and the bad
pointer stress attempting to pass a string acual parameter to a
procedure with a pointer formal parameter.

gcc/testsuite/ChangeLog:

	* gm2/pim/fail/badpointer.mod: New test.
	* gm2/pim/fail/badpointer2.mod: New test.
	* gm2/pim/fail/badpointer3.mod: New test.
	* gm2/projects/pim/run/pass/pegfive/pegfive.mod: New test.
	* gm2/projects/pim/run/pass/pegfive/projects-pim-run-pass-pegfive.exp: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

Found in PR112971 this patch adds folding support for bitwise operations
of const duplicate zero/one vectors with stepped vectors.
On riscv we have the situation that a folding would perpetually continue
without simplifying because e.g. {0, 0, 0, ...} & {7, 6, 5, ...} would
not be folded to {0, 0, 0, ...}.

gcc/ChangeLog:

	PR middle-end/112971

	* fold-const.cc (simplify_const_binop): New function for binop
	simplification of two constant vectors when element-wise
	handling is not necessary.
	(const_binop): Call new function.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr112971.c: New test.

On Solaris/SPARC several vector tests appeared to be regressing.  They
were never vectorized but the checks before r14-3612-ge40edf64995769
would match regardless if a loop was actually vectorized or not.
The refined checks only match a successful vectorization attempt
but are run unconditionally.  This patch adds target checks to them.

gcc/testsuite/ChangeLog:

	PR testsuite/113558

	* gcc.dg/vect/no-scevccp-outer-7.c: Add target check.
	* gcc.dg/vect/vect-outer-4c-big-array.c: Ditto.
	* gcc.dg/vect/vect-reduc-dot-s16a.c: Ditto.
	* gcc.dg/vect/vect-reduc-dot-s8a.c: Ditto.
	* gcc.dg/vect/vect-reduc-dot-s8b.c: Ditto.
	* gcc.dg/vect/vect-reduc-dot-u16b.c: Ditto.
	* gcc.dg/vect/vect-reduc-dot-u8a.c: Ditto.
	* gcc.dg/vect/vect-reduc-dot-u8b.c: Ditto.
	* gcc.dg/vect/vect-reduc-pattern-1a.c: Ditto.
	* gcc.dg/vect/vect-reduc-pattern-1b-big-array.c: Ditto.
	* gcc.dg/vect/vect-reduc-pattern-1c-big-array.c: Ditto.
	* gcc.dg/vect/vect-reduc-pattern-2a.c: Ditto.
	* gcc.dg/vect/vect-reduc-pattern-2b-big-array.c: Ditto.
	* gcc.dg/vect/wrapv-vect-reduc-dot-s8b.c: Ditto.

Confusion in binding_cluster::maybe_get_compound_binding about whether
offsets are relative to the start of the region or to the start of the
cluster was leading to incorrect handling of default values, leading
to false positives from -Wanalyzer-use-of-uninitialized-value, from
-Wanalyzer-exposure-through-uninit-copy, and other logic errors.

Fixed thusly.

gcc/analyzer/ChangeLog:
	PR analyzer/112969
	* store.cc (binding_cluster::maybe_get_compound_binding): When
	populating default_map, express the bit-range of the default key
	for REG relative to REG, rather than to the base region.

gcc/testsuite/ChangeLog:
	PR analyzer/112969
	* c-c++-common/analyzer/compound-assignment-5.c (test_3): Remove
	xfails, reorder tests.
	* c-c++-common/analyzer/compound-assignment-pr112969.c: New test.
	* gcc.dg/plugin/infoleak-pr112969.c: New test.
	* gcc.dg/plugin/plugin.exp: Add infoleak-pr112969.c to
	analyzer_kernel_plugin.c tests.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

This patch corrects the definition of lseek by changing the second
parameter to a CSSIZE_T rather than LONGINT and allow the return value
to be ignored.

gcc/m2/ChangeLog:

	* gm2-libs/libc.def (lseek): Change the second parameter
	type to	CSSIZE_T and make the return value optional.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

Spec: github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md

Contributors:
  Mary Bennett <mary.bennett@embecosm.com>
  Nandni Jamnadas <nandni.jamnadas@embecosm.com>
  Pietra Ferreira <pietra.ferreira@embecosm.com>
  Charlie Keaney
  Jessica Mills
  Craig Blackmore <craig.blackmore@embecosm.com>
  Simon Cook <simon.cook@embecosm.com>
  Jeremy Bennett <jeremy.bennett@embecosm.com>
  Helene Chelin <helene.chelin@embecosm.com>

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc: Add XCVbitmanip.
	* config/riscv/constraints.md: Likewise.
	* config/riscv/corev.def: Likewise.
	* config/riscv/corev.md: Likewise.
	* config/riscv/predicates.md: Likewise.
	* config/riscv/riscv-builtins.cc (AVAIL): Likewise.
	* config/riscv/riscv-ftypes.def: Likewise.
	* config/riscv/riscv.opt: Likewise.
	* config/riscv/riscv.cc (riscv_print_operand): Add new operand 'Y'.
	* doc/extend.texi: Add XCVbitmanip builtin documentation.
	* doc/sourcebuild.texi: Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/cv-simd-abs-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-abs-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxconj-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extract-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extract-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extractu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extractu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-insert-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-insert-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-march-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-neg-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-neg-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-pack-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-pack-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-packhi-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-packlo-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shuffle-sci-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shuffle2-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shuffle2-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei0-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei1-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei2-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei3-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-sc-h-compile-1.c: New test.
	* lib/target-supports.exp: Add proc for XCVsimd extension.

gcc/
	* config/gcn/gcn-hsa.h (ASM_SPEC): Add space after -mxnack= argument.

Also adjust some of the tests for scan-assembly. The behavior is the
same as --param=riscv-vector-abi before.

gcc/ChangeLog:

	PR target/113538
	* config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag.
	(riscv_fntype_abi): Ditto.
	* config/riscv/riscv.opt: Ditto.

gcc/testsuite/ChangeLog:

	PR target/113538
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c: Fix the asm
	check.
	* gcc.target/riscv/rvv/base/abi-call-args-1-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-2-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-3-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-3.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-4-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-4.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-error-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-return-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-return.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-variant_cc.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-69.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-70.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-71.c: Ditto.
	* gcc.target/riscv/rvv/base/misc_vreinterpret_vbool_vint.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vfadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vget_vset.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vloxseg2ei16.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vreinterpret.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vfadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vget_vset.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vloxseg2ei16.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vreinterpret.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-10.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-11.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-9.c: Ditto.
	* gcc.target/riscv/rvv/base/tuple_vundefined.c: Ditto.
	* gcc.target/riscv/rvv/base/vcreate.c: Ditto.
	* gcc.target/riscv/rvv/base/vlmul_ext-1.c: Ditto.
	* gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c: Ditto.
	* gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c: Ditto.
	* lib/target-supports.exp: Remove the flag.

Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com>