ChangeLog:

2021-05-17  Serge Belyshev  <belyshev@depni.sinp.msu.ru>

	* MAINTAINERS (Write After Approval): Add myself.

The team barrier should be notified of any new tasks that become runnable
as the result of a completing task, otherwise the barrier threads might
not resume processing available tasks, resulting in a hang.

2021-05-17  Kwok Cheung Yeung  <kcy@codesourcery.com>

	libgomp/
	* task.c (omp_fulfill_event): Call gomp_team_barrier_set_task_pending
	if new tasks generated.
	* testsuite/libgomp.c-c++-common/task-detach-13.c: New.

The current diagnostic assumes the reference binding fails because the
reference is non-const, but it can also fail if the rvalue is volatile.

Use the current diagnostic for non-const cases, and a modified
diagnostic otherwise.

gcc/cp/ChangeLog:

	PR c++/100635
	* call.c (convert_like_internal): Print different diagnostic if
	the lvalue reference is const.

gcc/testsuite/ChangeLog:

	* g++.dg/conversion/pr100635.C: New test.

Variables with explicit SAVE attribute cannot end up on the stack.
There is no point in checking whether they should be moved off the
stack to static storage.

gcc/fortran/ChangeLog:

	PR fortran/98411
	* trans-decl.c (gfc_finish_var_decl): Add check for explicit SAVE
	attribute.

gcc/testsuite/ChangeLog:

	PR fortran/98411
	* gfortran.dg/pr98411.f90: New test.

Fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100334

libstdc++-v3/ChangeLog:
	* include/bits/atomic_wait.h (__waiter::_M_do_wait_v): loop
	until value change observed.
	(__waiter_base::_M_laundered): New member.
	(__waiter_base::_M_notify): Check _M_laundered to determine
	whether to wake one or all.
	(__detail::__atomic_compare): Return true if call to
	__builtin_memcmp() == 0.
	(__waiter_base::_S_do_spin_v): Adjust predicate.
	* testsuite/29_atomics/atomic/wait_notify/100334.cc: New
	test.

The atomic ops in nvptx.md have memmodel arguments, which are currently
ignored.

Handle these, fixing test-case fails libgomp.c-c++-common/reduction-{5,6}.c
on volta.

Tested libgomp on x86_64-linux with nvptx accelerator.

gcc/ChangeLog:

2021-05-17  Tom de Vries  <tdevries@suse.de>

	PR target/100497
	* config/nvptx/nvptx-protos.h (nvptx_output_atomic_insn): Declare
	* config/nvptx/nvptx.c (nvptx_output_barrier)
	(nvptx_output_atomic_insn): New function.
	(nvptx_print_operand): Add support for 'B'.
	* config/nvptx/nvptx.md: Use nvptx_output_atomic_insn for atomic
	insns.

The constraint check for filesystem::path construction uses
decltype(__is_path_src(declval<Source>())) which mean it considers
conversion from an rvalue.  When Source is a volatile-qualified type
it cannot use is_path_src(const Unknown&) because a const lvalue
reference can only bind to a non-volatile rvalue.

Since the relevant path members all have a const Source& parameter,
the constraint should be defined in terms of declval<const Source&>(),
not declval<Source>(). This avoids the problem of volatile-qualified
rvalues, because we no longer use an rvalue at all.

libstdc++-v3/ChangeLog:

	PR libstdc++/100630
	* include/experimental/bits/fs_path.h (__is_constructible_from):
	Test construction from a const lvalue, not an rvalue.
	* testsuite/27_io/filesystem/path/construct/100630.cc: New test.
	* testsuite/experimental/filesystem/path/construct/100630.cc:
	New test.

This patch provides better diagnostics for common misuse of
[locale.convenience] functions with std::string as a character type.

libstdc++-v3/ChangeLog:

	PR libstdc++/89728
	* include/bits/locale_facets.h (ctype<basic_string<C,T,A>>):
	Declare (but do not define) partial specialization.
	* testsuite/22_locale/ctype/is/string/89728_neg.cc: New test.

libstdc++-v3/ChangeLog:

	* include/std/thread (jthread::_S_create): Fix static assert
	message.
	* testsuite/30_threads/jthread/95989.cc: Re-enable test.
	* testsuite/30_threads/jthread/jthread.cc: Do not require
	pthread effective target.
	* testsuite/30_threads/jthread/2.cc: Moved to...
	* testsuite/30_threads/jthread/version.cc: ...here.

Both initial_condition_in_loop_num and evolution_part_in_loop_num
can return NULL.  This patch exits if either one is NULL.  Presumably
this didn't happen before, because adjust_range_with_scev was called
far less frequently than in ranger, which can call it for every PHI.

gcc/ChangeLog:

	PR tree-optimization/100349
	* vr-values.c (bounds_of_var_in_loop): Bail if scev returns
	  NULL.

gcc/testsuite/ChangeLog:

	* gcc.dg/pr100349.c: New test.

Currently when using -mcpu=native or -march=native on a CPU that is unknown to
the compiler the compiler currently just used -march=armv8-a and enables none
of the extensions.

To make this a bit more useful this patch changes it to still use -march=armv8.a
but to enable the extensions.  We still cannot do tuning but at least if using
this on a future SVE core the compiler will at the very least enable SVE etc.

gcc/ChangeLog:

	* config/aarch64/driver-aarch64.c (DEFAULT_ARCH): New.
	(host_detect_local_cpu): Use it.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/cpunative/info_16: New test.
	* gcc.target/aarch64/cpunative/info_17: New test.
	* gcc.target/aarch64/cpunative/native_cpu_16.c: New test.
	* gcc.target/aarch64/cpunative/native_cpu_17.c: New test.

gcc/ChangeLog:

	* doc/invoke.texi: Add 2 missing dots.

When duplicate labes are diagnosed, avoid building a GIMPLE_LABEL.

2021-05-17  Richard Biener  <rguenther@suse.de>

	PR c/100625
gcc/c/
	* gimple-parser.c (c_parser_gimple_label): Avoid building
	a GIMPLE label with NULL label decl.

gcc/testsuite/
	* gcc.dg/gimplefe-error-9.c: New testcase.

Fix a bootstrap error observed on NetBSD.

2021-05-17  Marius Hillenbrand  <mhillen@linux.ibm.com>

gcc/ChangeLog:

	PR bootstrap/100552
	* configure.ac: Replace pattern substitution with call to sed.
	* configure: Regenerate.

Vector indexing leaves us with ARRAY_REFs of VIEW_CONVERT_EXPRs,
sth which array_at_struct_end_p considers a array-at-struct-end
even when there's an underlying decl visible.  The following fixes
the latter.

2021-05-17  Richard Biener  <rguenther@suse.de>

	PR middle-end/100582
	* tree.c (array_at_struct_end_p): Get to the base of the
	reference before looking for the underlying decl.

	* gcc.target/i386/pr100582.c: New testcase.

gcc/
	* genoutput.c (validate_insn_alternatives) Make "wrong number of
	alternatives" message more specific, and remove assumption on where
	the problem is.

This patch adds __fp16 support to the previous patch that added vcmp
support with MVE. For this we update existing expanders to use VDQWH
iterator, and add a new expander vcond<VH_cvtto><mode>.  In the
process we need to create suitable iterators, and update v_cmp_result
as needed.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/iterators.md (V16): New iterator.
	(VH_cvtto): New iterator.
	(v_cmp_result): Added V4HF and V8HF support.
	* config/arm/vec-common.md (vec_cmp<mode><v_cmp_result>): Use VDQWH.
	(vcond<mode><mode>): Likewise.
	(vcond_mask_<mode><v_cmp_result>): Likewise.
	(vcond<VH_cvtto><mode>): New expander.

	gcc/testsuite/
	* gcc.target/arm/simd/mve-compare-3.c: New test with GCC vectors.
	* gcc.target/arm/simd/mve-vcmp-f16.c: New test for
	auto-vectorization.
	* gcc.target/arm/armv8_2-fp16-arith-1.c: Adjust since we now
	vectorize float16_t vectors.

Since MVE has a different set of vector comparison operators from
Neon, we have to update the expansion to take into account the new
ones, for instance 'NE' for which MVE does not require to use 'EQ'
with the inverted condition.

Conversely, Neon supports comparisons with #0, MVE does not.

For:
typedef long int vs32 __attribute__((vector_size(16)));
vs32 cmp_eq_vs32_reg (vs32 a, vs32 b) { return a == b; }

we now generate:
cmp_eq_vs32_reg:
	vldr.64 d4, .L123       @ 8     [c=8 l=4]  *mve_movv4si/8
	vldr.64 d5, .L123+8
	vldr.64 d6, .L123+16    @ 9     [c=8 l=4]  *mve_movv4si/8
	vldr.64 d7, .L123+24
	vcmp.i32  eq, q0, q1    @ 7     [c=16 l=4]  mve_vcmpeqq_v4si
	vpsel q0, q3, q2        @ 15    [c=8 l=4]  mve_vpselq_sv4si
	bx      lr      @ 26    [c=8 l=4]  *thumb2_return
.L124:
	.align  3
.L123:
	.word   0
	.word   0
	.word   0
	.word   0
	.word   1
	.word   1
	.word   1
	.word   1

For some reason emit_move_insn (zero, CONST0_RTX (cmp_mode)) produces
a pair of vldr instead of vmov.i32, qX, #0

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/arm-protos.h (arm_expand_vector_compare): Update
	prototype.
	* config/arm/arm.c (arm_expand_vector_compare): Add support for
	MVE.
	(arm_expand_vcond): Likewise.
	* config/arm/iterators.md (supf): Remove VCMPNEQ_S, VCMPEQQ_S,
	VCMPEQQ_N_S, VCMPNEQ_N_S.
	(VCMPNEQ, VCMPEQQ, VCMPEQQ_N, VCMPNEQ_N): Remove.
	* config/arm/mve.md (@mve_vcmp<mve_cmp_op>q_<mode>): Add '@' prefix.
	(@mve_vcmp<mve_cmp_op>q_f<mode>): Likewise.
	(@mve_vcmp<mve_cmp_op>q_n_f<mode>): Likewise.
	(@mve_vpselq_<supf><mode>): Likewise.
	(@mve_vpselq_f<mode>"): Likewise.
	* config/arm/neon.md (vec_cmp<mode><v_cmp_result): Enable for MVE
	and move to vec-common.md.
	(vec_cmpu<mode><mode>): Likewise.
	(vcond<mode><mode>): Likewise.
	(vcond<V_cvtto><mode>): Likewise.
	(vcondu<mode><v_cmp_result>): Likewise.
	(vcond_mask_<mode><v_cmp_result>): Likewise.
	* config/arm/unspecs.md (VCMPNEQ_U, VCMPNEQ_S, VCMPEQQ_S)
	(VCMPEQQ_N_S, VCMPNEQ_N_S, VCMPEQQ_U, CMPEQQ_N_U, VCMPNEQ_N_U)
	(VCMPGEQ_N_S, VCMPGEQ_S, VCMPGTQ_N_S, VCMPGTQ_S, VCMPLEQ_N_S)
	(VCMPLEQ_S, VCMPLTQ_N_S, VCMPLTQ_S, VCMPCSQ_N_U, VCMPCSQ_U)
	(VCMPHIQ_N_U, VCMPHIQ_U): Remove.
	* config/arm/vec-common.md (vec_cmp<mode><v_cmp_result): Moved
	from neon.md.
	(vec_cmpu<mode><mode>): Likewise.
	(vcond<mode><mode>): Likewise.
	(vcond<V_cvtto><mode>): Likewise.
	(vcondu<mode><v_cmp_result>): Likewise.
	(vcond_mask_<mode><v_cmp_result>): Likewise. Added unsafe math
	condition.

	gcc/testsuite
	* gcc.target/arm/simd/mve-compare-1.c: New test with GCC vectors.
	* gcc.target/arm/simd/mve-compare-2.c: New test with GCC vectors.
	* gcc.target/arm/simd/mve-compare-scalar-1.c: New test with GCC
	vectors.
	* gcc.target/arm/simd/mve-vcmp-f32.c: New test for
	auto-vectorization.
	* gcc.target/arm/simd/mve-vcmp.c: New test for auto-vectorization.

When arg0 is same as arg1 in __builtin_ia32_pcmpgtw,
gimple_build (&stmts, GT_EXPR, cmp_type, arg0, arg1) will simplify the
comparison to vector constant 0, no stmts is generated, which causes
ICE in gsi_insert_before (gsi, stmts, GSI_SAME_STMT). So use
gsi_insert_seq_before instead which will handle NULL seq.

gcc/ChangeLog:

	PR target/100549
	* config/i386/i386.c (ix86_gimple_fold_builtin): Use
	gsi_insert_seq_before instead.

gcc/testsuite/ChangeLog:

	PR target/100549
	* gcc.target/i386/pr100549.c: New test.

This patch adds a test for the scalar mode of vadd, precisely noting
that we do not yet use the T2 variants of vadd, which take a scalar as
final argument.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/simd/mve-vadd-scalar-1.c: New.

Support for vadd has been present for a while, but it was lacking a
test.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/simd/mve-vadd-1.c: New.

Use a template macro to factorize the existing test functions.

This patch also adds a version to check subtraction with __fp16 type.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/simd/mve-vsub_1.c: Factorize and add __fp16 test.

Vector right shifts by immediate use vshr, while right shifts by
vectors instead use vneg and vshl.

This patch adds the corresponding scan-assembler-times that were
missing.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/simd/mve-vshr.c: Add more scan-assembler-times.

The acle/saturation.c test uses __[su]sat() and
__saturation_occurred() intrinsics but __[su]sat() are defined in
acle.h if __ARM_FEATURE_SAT true, while __saturation_occurred()
depends on __ARM_FEATURE_QBIT.

QBIT is a v5te feature, while SAT is available since v6, so the test
really needs __ARM_FEATURE_SAT, to have both available.

This patch renames arm_qbit_ok into arm_sat_ok and checks
__ARM_FEATURE_SAT. It updates acle/saturation.c accordingly.

This enables the test to pass on arm-eabi with default cpu/fpu/mode,
where arm_qbit previously used -march=armv5te instead of armv6 now.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* doc/sourcebuild.texi (arm_qbit_ok): Rename into...
	(arm_sat_ok): ...this.

	gcc/testsuite/
	* gcc.target/arm/acle/saturation.c: Use arm_sat_ok effective
	target.
	* lib/target-supports.exp
	(check_effective_target_arm_qbit_ok_nocache): Rename into...
	(check_effective_target_arm_sat_ok_nocache): ... this. Check
	__ARM_FEATURE_SAT and use armv6.

	PR fortran/100633

gcc/fortran/ChangeLog:

	* resolve.c (gfc_resolve_code): Reject nonintrinsic assignments in
	OMP WORKSHARE.

gcc/testsuite/ChangeLog:

	* gfortran.dg/gomp/workshare-59.f90: New test.

This allows the Doxygen PDF to be built using lualatex instead of
pdflatex, which solves a problem with pdflatex running out of memory
sometimes. This is done by adding a --latex_cmd option to the
run_doxygen script, which then sets the specified command in the
generated user.cfg file used by Doxygen. The makefile is adjusted to
pass --latex_cmd=$(LATEX_CMD) to the script, so using running make with
LATEX_CMD=lualatex will override the default.

Additionally, this does some refactoring of the doc/Makefile.am rules
and the run_doxygen script.

libstdc++-v3/ChangeLog:

	* doc/Makefile.am: Simplify doxygen recipes and use --latex_cmd.
	* doc/Makefile.in: Regenerate.
	* doc/doxygen/user.cfg.in (LATEX_CMD_NAME): Add placeholder
	value.
	* scripts/run_doxygen (print_usage): Always print to stdout and
	do not exit.
	(fail): New function for exiting on error.
	(parse_options): Handle --latex_cmd. Do not treat --help the
	same as errors. Simplify handling of required arguments.

	* c-common.c (braced_list_to_string): Return CTOR unchanged
	if host and target character sizes don't match.

gcc/ChangeLog:

	* lto-wrapper.c (merge_flto_options): Factor out a new function.
	(merge_and_complain): Use it.
	(run_gcc): Merge also linker command line -flto=foo argument
	with IL files.

The related test uses -fopenmp, which is not supported by newlib-based
targets such as arm-eabi or aarch64-elf.

Requiring the openmp effective-target makes the test unsupported
rather than failed.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

	PR debug/100515
	gcc/testsuite
	* gcc.dg/debug/dwarf2/pr100515.c: Require openmp effective-target.

This updates the mpfr version to 3.1.6 which is the last bugfix
release from the 3.1.x series and avoids printing the version
is buggy but acceptable from our configury.

2021-05-17  Richard Biener  <rguenther@suse.de>

contrib/ChangeLog:
	* download_prerequisites: Update mpfr version to 3.1.6.
	* prerequisites.md5: Update.
	* prerequisites.sha512: Likewise.

This reverts commit fe108dad.

	* g++.dg/ext/attrib63.C: Add -Wno-psabi option.

	* g++.dg/warn/uninit-pr93100.C: Require fsantize support.

arm.h has had this error message since 1997, but it is no longer
needed since option parsing has been improved: -mXXX-endian is handled
via arm.opt and updates the BIG_END mask. So, the last
instance of -mXXX-endian on the command line wins.

Tested on many arm* configurations, with no impact on the testsuite results.

2021-05-16  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/
	* config/arm/arm.h (CPP_SPEC): Remove error message about
	-mlittle-endian/-mbig-endian conflict.

The test requires an FPU, so use -march=armv7-a+fp -mfpu=auto instead
of -march=armv7-a.

We also remove dg-require-effective-target arm_fp_ok, but keep
dg-add-options arm_fp: this enables the test to pass on arm-eabi
configured with default cpu/fpu/mode.

dg-require-effective-target arm_fp_ok fails on such a configuration
for lack of FPU, since dg-options are not taken into account by
dg-require-effective-target.

Add -march=armv7-a+fp -mfpu=auto is sufficient for arm_fp options to
be acceptable.

This enables the test to pass on all the arm-eabi configurations I'm
testing, as well as arm-linux-gnueabi when forcing -march=armv5t.

2021-05-16  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/unsigned-float.c: Remove arm_fp_ok, adjust
	dg-options.

2021-05-13  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/testsuite/
	* gcc.target/powerpc/rop-1.c: New.
	* gcc.target/powerpc/rop-2.c: New.
	* gcc.target/powerpc/rop-3.c: New.
	* gcc.target/powerpc/rop-4.c: New.
	* gcc.target/powerpc/rop-5.c: New.

2021-05-13  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__ROP_PROTECT__ if -mrop-protect is selected.

2021-05-14  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-internal.h (rs6000_stack): Add
	rop_hash_save_offset and rop_hash_size.
	* config/rs6000/rs6000-logue.c (rs6000_stack_info): Compute
	rop_hash_size and rop_hash_save_offset.
	(debug_stack_info): Dump rop_hash_save_offset and rop_hash_size.
	(rs6000_emit_prologue): Emit hashst[p] in prologue.
	(rs6000_emit_epilogue): Emit hashchk[p] in epilogue.
	* config/rs6000/rs6000.md (unspec): Add UNSPEC_HASHST and
	UNSPEC_HASHCHK.
	(hashst): New define_insn.
	(hashchk): Likewise.