PR rtl-optimization/19103
	* loop-iv.c (iv_number_of_iterations): Fix typo.

From-SVN: r92669

From-SVN: r92668

	* vax.c (vax_address_cost, vax_rtx_cost): Correct casts.
	(vax_rtx_cost): Handle small offsets for both PLUS and MINUS.

From-SVN: r92667

        * tree-ssa-dom.c (thread_across_edge): Remove broken code to
        avoid threading into a loop.

From-SVN: r92666

        PR target/17406
        * config/i386/i386.c (ix86_expand_prologue): Add REG_FRAME_RELATED_EXPR
        note for allocate_stack_worker insn.

From-SVN: r92662

libstdc++:
        Add memory barriers to the double-checked locking used for static
        initialization.
        * libsupc++/guard.cc (__test_and_acquire): Define default.
        (_GLIBCXX_GUARD_TEST_AND_ACQUIRE, __set_and_release)
        (_GLIBCXX_GUARD_SET_AND_RELEASE): Likewise.
        (recursion_push, recursion_pop): New abstraction functions.
        (__cxa_guard_acquire): Use _GLIBCXX_GUARD_TEST_AND_ACQUIRE.
        (__cxa_guard_release): Use _GLIBCXX_GUARD_SET_AND_RELEASE.
        * config/cpu/generic/cxxabi_tweaks.h (_GLIBCXX_GUARD_TEST): Rename
        from _GLIBCXX_GUARD_ACQUIRE and reverse sense.
        (_GLIBCXX_GUARD_SET): Rename from _GLIBCXX_GUARD_RELEASE.
        * config/cpu/arm/cxxabi_tweaks.h: Likewise.
        * config/cpu/alpha/atomic_word.h (_GLIBCXX_READ_MEM_BARRIER)
        (_GLIBCXX_WRITE_MEM_BARRIER): Define.
        * config/cpu/powerpc/atomic_word.h: Likewise.
        * config/cpu/sparc/atomic_word.h: Likewise.
        * config/cpu/generic/atomic_word.h: Define them, commented out.
        * include/bits/atomicity.h: Define defaults.
        * config/cpu/ia64/atomic_word.h (__test_and_acquire)
        (__set_and_release): New inlines.
        (_GLIBCXX_GUARD_TEST_AND_ACQUIRE): Define.
        (_GLIBCXX_GUARD_SET_AND_RELEASE): Define.

        * libsupc++/guard.cc (acquire_1): Use __builtin_trap instead of
        abort();

gcc:
        * doc/tm.texi (TARGET_RELAXED_ORDERING): Document.
        * target.h (struct gcc_target): Add relaxed_ordering field.
        * target-def.h (TARGET_RELAXED_ORDERING): Define default.
        (TARGET_INITIALIZER): Add it.
        * config/alpha/alpha.c (TARGET_RELAXED_ORDERING): Define.
        * config/ia64/ia64.c (TARGET_RELAXED_ORDERING): Define.
        * config/rs6000/rs6000.c (TARGET_RELAXED_ORDERING): Define.
        * config/sparc/sparc.c (TARGET_RELAXED_ORDERING): Define.
        * cp/decl.c (expand_static_init): Don't use shortcut if
        targetm.relaxed_ordering.

From-SVN: r92659

	PR driver/16118
	* doc/invoke.texi: Document the interaction between -save-temps
	and -x.

From-SVN: r92658

        * config/rs6000/rs6000.c (rs6000_eliminate_indexed_memrefs):
        Do not break apart constant pool addresses.
        (rs6000_emit_move): Only force source into REG if target is MEM.

From-SVN: r92657

From-SVN: r92655

2004-12-27  H.J. Lu  <hongjiu.lu@intel.com>

	* Makefile.in: Undo to 2004-12-17.
	* aclocal.m4: Likewise.
	* config.table: Likewise.
	* configure.ac: Likewise.
	* maint-tool: Likewise.
	* configure: Likewise.

From-SVN: r92651

	PR c++/19149
	* decl.c (check_tag_decl): Robustify.

	PR c++/19149
	* g++.dg/parse/error23.C: New test.

From-SVN: r92648

2004-12-27  Paolo Carlini  <pcarlini@suse.de>

	* include/tr1/type_traits: Rework the _DEFINE_SPEC* macros.

From-SVN: r92647

From-SVN: r92646

fortran/
PR fortran/19032
* trans-intrinsic.c (gfc_conv_intrinsic_mod): Update comment
in front of function to match the standard.  Correct handling
of MODULO.

testsuite/
PR fortran/19032
* gfortran.dg/intrinsic_modulo_1.f90: New.
* gfortran.fortran-torture/execute/intrinsic_mod_ulo.f90: Add
tests with divisor -1.

From-SVN: r92645

trans-expr.c (gfc_conv_cst_int_power): Only check for flag_unsafe_math_optimizations if we have a float type.

2004-12-27  Andrew Pinski  <pinskia@physics.uc.edu>

        * trans-expr.c (gfc_conv_cst_int_power): Only check for
        flag_unsafe_math_optimizations if we have a float type.

From-SVN: r92644

From-SVN: r92643

gcc/fortran/
* trans-intrinsic.c (gfc_conv_intrinsic_ishft): Change to
logicalshift.  Call fold.  Remove 0-bit shift shortcut.
(gfc_conv_intrinsic_ishftc): Convert first argument to at least
4 bytes bits.  Convert 2nd and 3rd argument to 4 bytes.  Convert
result if width(arg 1) < 4 bytes.  Call fold.

libgfortran/
* libgfortran/libgfortran.h (GFC_UINTEGER_1, GFC_UINTEGER_2):
Define.
* intrinsics/ishftc.c: Update copyright years.
(ishftc8): Change 'shift' and 'size' to GFC_INTEGER_4.
* intrinsics/mvbits.c: Correcty non-ASCII character in my name.
Add implementations for GFC_INTEGER_1 and GFC_INTEGER_2.

gcc/testsuite/
* gfortran.dg/g77/f90-intrinsic-bit.f: New.

From-SVN: r92642

	PR c++/19148
	* g++.dg/expr/cond7.C: New test.

From-SVN: r92641

	PR c++/19148
	* gimplify.c (gimplify_cond_expr): Add post_p parameter.
	(gimplify_modify_expr_rhs): Adjust call to gimplify_cond_expr.
	(gimplify_expr): Likewise.

From-SVN: r92640

From-SVN: r92639

        * config/i386/i386.h (UNITS_PER_SIMD_WORD): Don't use MMX/3DNOW.

        * gcc.dg/vect/vect-27a.c, gcc.dg/vect/vect-29a.c,
        gcc.dg/vect/vect-48a.c, gcc.dg/vect/vect-56a.c,
        gcc.dg/vect/vect-72a.c, gcc.dg/vect/vect-77a.c: Remove.

From-SVN: r92637

From-SVN: r92636

        * gcc.dg/compat/compat-common.h (CINT, CDBL): Use multiplication
        by 1i instead of token pasting.

From-SVN: r92635

        * config/i386/i386.md (mov<MMXMODEI>_internal_rex64): New.
        (movv2sf_internal_rex64): New.
        (mov<MMXMODEI>_internal): Use no register preferences at all.
        (movv2sf_internal): Likewise.

From-SVN: r92634

        * config/i386/i386.c (ix86_gimplify_va_arg): Also pass the result
        of type_natural_mode to examine_argument.

From-SVN: r92633

simplify-rtx.c (simplify_relational_operation_1): Don't simplify plus/minus across EQ for floating-point.

        * simplify-rtx.c (simplify_relational_operation_1): Don't simplify
        plus/minus across EQ for floating-point.

From-SVN: r92631

	PR target/17643
	* pa.c (pa_function_ok_for_sibcall): Sibcalls are not ok when
	generating code for the portable runtime.

From-SVN: r92629

From-SVN: r92626

re PR tree-optimization/17578 (Missed optimization--failure of gcc.c-torture/execute/ieee/compare-fp-3.c at -O1 and above)

	PR tree-optimization/17578
	* gcc.c-torture/execute/ieee/compare-fp-3.x: Append -fno-trapping-math
	to additional_flags.
	* gcc.c-torture/execute/ieee/compare-fp-4.x: Likewise.

From-SVN: r92623

2004-12-26  Paolo Carlini  <pcarlini@suse.de>

	* include/tr1/type_traits (__is_enum_helper): Slightly simplify,
	make __convert non template.

From-SVN: r92622

2004-12-26  Paolo Carlini  <pcarlini@suse.de>

	* include/tr1/type_traits: Implement is_pod, has_trivial_constructor,
	and has_trivial_destructor.
	* testsuite/tr1/4_metaprogramming/type_properties/
	has_trivial_constructor/has_trivial_constructor.cc: New.
	* testsuite/tr1/4_metaprogramming/type_properties/
	has_trivial_constructor/typedefs.cc: Likewise.
	* testsuite/tr1/4_metaprogramming/type_properties/
	has_trivial_destructor/has_trivial_destructor.cc: Likewise.
	* testsuite/tr1/4_metaprogramming/type_properties/
	has_trivial_destructor/typedefs.cc: Likewise.
	* testsuite/tr1/4_metaprogramming/type_properties/
	is_pod/is_pod.cc: Likewise.
	* testsuite/tr1/4_metaprogramming/type_properties/
	is_pod/typedefs.cc: Likewise.

From-SVN: r92618

        * expr.c (clear_storage): Validate CONST0_RTX extant.  Special case
        complex modes.

From-SVN: r92615

        * lib/target-supports.exp (check_effective_target_vect_no_bitwise):
	Remove Alpha.

From-SVN: r92614

From-SVN: r92612

From-SVN: r92609

	PR rtl-optimization/19078
	* tree-ssa-loop-ivopts.c (determine_use_iv_cost_generic,
	determine_use_iv_cost_outer): Fix computing of cost for the original
	bivs.
	(dump_use): Handle case related_cands == NULL.

From-SVN: r92608

	PR target/19059
	* config/avr/avr.c (avr_mcu_types): Move attiny{13,2313} from avr4
	to avr2.
	* config/avr/avr.h (LINK_SPEC): Ditto.
	* config/avr/t-avr (MULTILIB_MATCHES): Ditto.

From-SVN: r92607

	* gcc.dg/pr17055-1.c (dg-options): Add -fno-common to options on
	hppa*-*-hpux*.
	* gcc.dg/pr17957.c (dg-options): Likewise.
	* gcc.dg/struct-ret-1.c: Add prototype for abort.
	* gcc.dg/tree-ssa/asm-2.c, gcc.dg/tree-ssa/asm-3.c: Use register 1
	instead of 0 on __hppa__.
	* gcc.dg/tree-ssa/loop-1.c (dg-final): Check for five instances of
	"foo,%r" on hppa*-*-*.

From-SVN: r92606

2004-12-25  Paolo Carlini  <pcarlini@suse.de>

	* include/tr1/type_traits (is_enum): Minor tweak.

From-SVN: r92605

2004-12-25  Paolo Carlini  <pcarlini@suse.de>

	* include/tr1/type_traits: Implement is_enum (usual caveats about
	the nasty consequences of c++/19076...).
	* testsuite/testsuite_tr1.h: Add ConvType.
	* testsuite/tr1/4_metaprogramming/composite_type_traits/
	is_scalar/is_scalar.cc: New.
	* testsuite/tr1/4_metaprogramming/composite_type_traits/
	is_scalar/typedefs.cc: Likewise.
	* testsuite/tr1/4_metaprogramming/primary_type_categories/
	is_enum/is_enum.cc: Likewise.
	* testsuite/tr1/4_metaprogramming/primary_type_categories/
	is_enum/typedefs.cc: Likewise.

From-SVN: r92604