This patch adds __flashx as a new named address space that allocates
objects in .progmemx.data.  The handling is mostly the same or similar
to that of 24-bit space __memx, except that the asm routines are
simpler and more efficient.  Loads are emit inline when ELPMX or
LPMX is available.  The address space uses a 24-bit addresses even
on devices with a program memory size of 64 KiB or less.

	PR target/118001
gcc/
	* doc/extend.texi (AVR Named Address Spaces): Document __flashx.
	* config/avr/avr.h (ADDR_SPACE_FLASHX): New enum value.
	* config/avr/avr-protos.h (avr_out_fload, avr_mem_flashx_p)
	(avr_fload_libgcc_p, avr_load_libgcc_mem_p)
	(avr_load_libgcc_insn_p): New.
	* config/avr/avr.cc (avr_addrspace): Add ADDR_SPACE_FLASHX.
	(avr_decl_flashx_p, avr_mem_flashx_p, avr_fload_libgcc_p)
	(avr_load_libgcc_mem_p, avr_load_libgcc_insn_p, avr_out_fload):
	New functions.
	(avr_adjust_insn_length) [ADJUST_LEN_FLOAD]: Handle case.
	(avr_progmem_p) [avr_decl_flashx_p]: return 2.
	(avr_addr_space_legitimate_address_p) [ADDR_SPACE_FLASHX]:
	Has same behavior like ADDR_SPACE_MEMX.
	(avr_addr_space_convert): Use pointer sizes rather then ASes.
	(avr_addr_space_contains): New function.
	(avr_convert_to_type): Use it.
	(avr_emit_cpymemhi): Handle ADDR_SPACE_FLASHX.
	* config/avr/avr.md (adjust_len) <fload>: New attr value.
	(gen_load<mode>_libgcc): Renamed from load<mode>_libgcc.
	(xload8<mode>_A): Iterate over MOVMODE rather than over ALL1.
	(fxmov<mode>_A): New from xloadv<mode>_A.
	(xmov<mode>_8): New from xload<mode>_A.
	(fmov<mode>): New insns.
	(fxload<mode>_A): New from xload<mode>_A.
	(fxload_<mode>_libgcc): New from xload_<mode>_libgcc.
	(*fxload_<mode>_libgcc): New from *xload_<mode>_libgcc.
	(mov<mode>) [avr_mem_flashx_p]: Hande ADDR_SPACE_FLASHX.
	(cpymemx_<mode>): Make sure the address space is not lost
	when splitting.
	(*cpymemx_<mode>) [ADDR_SPACE_FLASHX]: Use __movmemf_<mode> for asm.
	(*ashlqi.1.zextpsi_split): New combine pattern.
	* config/avr/predicates.md (nox_general_operand): Don't match
	when avr_mem_flashx_p is true.
	* config/avr/avr-passes.cc (AVR_LdSt_Props):
	ADDR_SPACE_FLASHX has no post_inc.

gcc/testsuite/
	* gcc.target/avr/torture/addr-space-1.h [AVR_HAVE_ELPM]:
	Use a function to bump .progmemx.data to a high address.
	* gcc.target/avr/torture/addr-space-2.h: Same.
	* gcc.target/avr/torture/addr-space-1-fx.c: New test.
	* gcc.target/avr/torture/addr-space-2-fx.c: New test.

libgcc/
	* config/avr/t-avr (LIB1ASMFUNCS): Add _fload_1, _fload_2,
	_fload_3, _fload_4, _movmemf.
	* config/avr/lib1funcs.S (.branch_plus): New .macro.
	(__xload_1, __xload_2, __xload_3, __xload_4): When the address is
	located in flash, then forward to...
	(__fload_1, __fload_2, __fload_3, __fload_4): ...these new
	functions, respectively.
	(__movmemx_hi): When the address is located in flash, forward to...
	(__movmemf_hi): ...this new function.

Unlike crtoffload{begin,end}.o which just define some symbols at the start/end
of the various .gnu.offload* sections, crtoffloadtable.o contains
const void *const __OFFLOAD_TABLE__[]
  __attribute__ ((__visibility__ ("hidden"))) =
{
  &__offload_func_table, &__offload_funcs_end,
  &__offload_var_table, &__offload_vars_end,
  &__offload_ind_func_table, &__offload_ind_funcs_end,
};
The problem is that linking this into PIEs or shared libraries doesn't
work when it is compiled without -fpic/-fpie - __OFFLOAD_TABLE__ for non-PIC
code is put into .rodata section, but it really needs relocations, so for
PIC it should go into .data.rel.ro/.data.rel.ro.local.
As I think we don't want .data.rel.ro section in non-PIE binaries, this patch
follows the path of e.g. crtbegin.o vs. crtbeginS.o and adds crtoffloadtableS.o
next to crtoffloadtable.o, where crtoffloadtableS.o is compiled with -fpic.

2024-11-30  Jakub Jelinek  <jakub@redhat.com>

	PR libgomp/117851
gcc/
	* lto-wrapper.cc (find_crtoffloadtable): Add PIE_OR_SHARED argument,
	search for crtoffloadtableS.o rather than crtoffloadtable.o if
	true.
	(run_gcc): Add pie_or_shared variable.  If OPT_pie or OPT_shared or
	OPT_static_pie is seen, set pie_or_shared to true, if OPT_no_pie is
	seen, set pie_or_shared to false.  Pass it to find_crtoffloadtable.
libgcc/
	* configure.ac (extra_parts): Add crtoffloadtableS.o.
	* Makefile.in (crtoffloadtableS$(objext)): New goal.
	* configure: Regenerated.

Including the "arm_acle.h" header in aarch64-unwind.h requires
stdint.h to be present and it may not be available during the
first stage of cross-compilation of GCC.

When cross-building GCC for the aarch64-none-linux-gnu target
(on any supporting host) using the 3-stage bootstrap build
process when we build native compiler from source, libgcc fails
to compile due to missing header that has not been installed yet.

This could be worked around but it's better to fix the issue.

libgcc/ChangeLog:

	* config/aarch64/aarch64-unwind.h (_CHKFEAT_GCS): Add.

gcc/ChangeLog:
	* config/aarch64/arm_acle.h (_CHKFEAT_GCS): New.

libgcc/ChangeLog:

	* config/aarch64/aarch64-unwind.h (_Unwind_Frames_Extra): Update.
	(_Unwind_Frames_Increment): Update

Reviewed-by: Richard Sandiford <richard.sandiford@arm.com>

nios2 target support in GCC was deprecated in GCC 14 as the
architecture has been EOL'ed by the vendor.  This patch removes the
entire port for GCC 15

There are still references to "nios2" in libffi and libgo.  Since those
libraries are imported into the gcc sources from master copies maintained
by other projects, those will need to be addressed elsewhere.

ChangeLog:
	* MAINTAINERS: Remove references to nios2.
	* configure.ac: Likewise.
	* configure: Regenerated.

config/ChangeLog:
	* mt-nios2-elf: Deleted.

contrib/ChangeLog:
	* config-list.mk: Remove references to Nios II.

gcc/ChangeLog:
	* common/config/nios2/*: Delete entire directory.
	* config/nios2/*: Delete entire directory.
	* config.gcc: Remove references to nios2.
	* configure.ac: Likewise.
	* doc/extend.texi: Likewise.
	* doc/install.texi: Likewise.
	* doc/invoke.texi: Likewise.
	* doc/md.texi: Likewise.
	* regenerate-opt-urls.py: Likewise.
	* config.in: Regenerated.
	* configure: Regenerated.

gcc/testsuite/ChangeLog:
	* g++.target/nios2/*: Delete entire directory.
	* gcc.target/nios2/*: Delete entire directory.
	* g++.dg/cpp0x/constexpr-rom.C: Remove refences to nios2.
	* g++.old-deja/g++.jason/thunk3.C: Likewise.
	* gcc.c-torture/execute/20101011-1.c: Likewise.
	* gcc.c-torture/execute/pr47237.c: Likewise.
	* gcc.dg/20020312-2.c: Likewise.
	* gcc.dg/20021029-1.c: Likewise.
	* gcc.dg/debug/btf/btf-datasec-1.c: Likewise.
	* gcc.dg/ifcvt-4.c: Likewise.
	* gcc.dg/stack-usage-1.c: Likewise.
	* gcc.dg/struct-by-value-1.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-33.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-34.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-35.c: Likewise.
	* gcc.dg/tree-ssa/reassoc-36.c: Likewise.
	* lib/target-supports.exp: Likewise.

libgcc/ChangeLog:
	* config/nios2/*: Delete entire directory.
	* config.host: Remove refences to nios2.
	* unwind-dw2-fde-dip.c: Likewise.

mips16.S was missing since
commit 29b74545
Date:   Thu Jun 1 10:14:24 2023 +0800

    MIPS: Add speculation_barrier support

Without mips16.S included, some symbols will miss for mips16, and
so some software will fail to build.

libgcc/ChangeLog:

	* config/mips/lib1funcs.S: Includes mips16.S.

libgcc/config/avr/libf7/
	PR target/115419
	* libf7.c (f7_get_double): Round tie breaks to even LSB.

Much like AT_HWCAP is already provided in case the platform headers
don't have the value (yet).

libgcc/

	* config/aarch64/cpuinfo.c: Provide AT_HWCAP2.

This patch adds missing assembly directives to the CMSE library wrapper to call
functions with attribute cmse_nonsecure_call.  Without the .type directive the
linker will fail to produce the correct veneer if a call to this wrapper
function is to far from the wrapper itself.  The .size was added for
completeness, though we don't necessarily have a usecase for it.

libgcc/ChangeLog:

	PR target/115360
	* config/arm/cmse_nonsecure_call.S: Add .type and .size directives.

Adding stub '_Unwind_Backtrace', '_Unwind_GetIPInfo' functions is necessary
for linking libbacktrace, as a normal (non-'LIBGFOR_MINIMAL') configuration
of libgfortran wants to do, for example.

The file 'libgcc/config/nvptx/unwind-nvptx.c' is copied from
'libgcc/config/gcn/unwind-gcn.c'.

libgcc/ChangeLog:

	* config/nvptx/t-nvptx: Add unwind-nvptx.c.
	* config/nvptx/unwind-nvptx.c: New file.

Co-authored-by: Andrew Stubbs <ams@gcc.gnu.org>

This extends commit d9c90c82
"nvptx target: Global constructor, destructor support, via nvptx-tools 'ld'"
for offloading.

	libgcc/
	* config/nvptx/gbl-ctors.c ["mgomp"]
	(__do_global_ctors__entry__mgomp)
	(__do_global_dtors__entry__mgomp): New.
	[!"mgomp"] (__do_global_ctors__entry, __do_global_dtors__entry):
	New.
	libgomp/
	* plugin/plugin-nvptx.c (nvptx_do_global_cdtors): New.
	(nvptx_close_device, GOMP_OFFLOAD_load_image)
	(GOMP_OFFLOAD_unload_image): Call it.

The CPU features initialization code uses CPUID registers (rather than
HWCAP).  The equality comparisons it uses are incorrect: for example FEAT_SVE
is not set if SVE2 is available.  Using HWCAPs for these is both simpler and
correct.  The initialization must also be done atomically to avoid multiple
threads causing corruption due to non-atomic RMW accesses to the global.

libgcc:
	PR target/115342
	* config/aarch64/cpuinfo.c (__init_cpu_features_constructor):
	Use HWCAP where possible.  Use atomic write for initialization.
	Fix FEAT_PREDRES comparison.
	(__init_cpu_features_resolver): Use atomic load for correct
	initialization.
	(__init_cpu_features): Likewise.

	PR target/115317
libgcc/config/avr/libf7/
	* libf7-asm.sx (__isinf): Map -Inf to -1.

gcc/testsuite/
	* gcc.target/avr/torture/pr115317-isinf.c: New test.

The function attributes 'constructor', 'destructor', and 'init_priority' now
work, as do the C++ features making use of this.  Test cases with effective
target 'global_constructor' and 'init_priority' now generally work, and
'check-gcc-c++' test results greatly improve; no more
"sorry, unimplemented: global constructors not supported on this target".

For proper execution test results, this depends on
<https://github.com/SourceryTools/nvptx-tools/commit/96f8fc59a757767b9e98157d95c21e9fef22a93b>
"ld: Global constructor/destructor support".

	gcc/
	* config/nvptx/nvptx.h: Configure global constructor, destructor
	support.
	gcc/testsuite/
	* gcc.dg/no_profile_instrument_function-attr-1.c: GCC/nvptx is
	'NO_DOT_IN_LABEL' but not 'NO_DOLLAR_IN_LABEL', so '$' may apper
	in identifiers.
	* lib/target-supports.exp
	(check_effective_target_global_constructor): Enable for nvptx.
	libgcc/
	* config/nvptx/crt0.c (__gbl_ctors): New weak function.
	(__main): Invoke it.
	* config/nvptx/gbl-ctors.c: New.
	* config/nvptx/t-nvptx: Configure global constructor, destructor
	support.

Since r9-4728 the powerpcspe support had been removed, this
follow-up patch is to remove the remaining pieces in libgcc.

libgcc/ChangeLog:

	* config.host: Remove powerpc-*-eabispe* support.
	* config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Remove
	__SPE__ code.
	* config/rs6000/t-savresfgpr (LIB2ADD_ST): Remove e500crtres32gpr.S,
	e500crtres32gpr.S, e500crtsav64gpr.S, e500crtsav64gprctr.S,
	e500crtres64gpr.S, e500crtsav32gpr.S, e500crtsavg32gpr.S,
	e500crtres64gprctr.S, e500crtsavg64gprctr.S, e500crtresx32gpr.S,
	e500crtrest32gpr.S, e500crtrest64gpr.S and e500crtresx64gpr.S.
	* config/rs6000/e500crtres32gpr.S: Remove.
	* config/rs6000/e500crtres64gpr.S: Remove.
	* config/rs6000/e500crtres64gprctr.S: Remove.
	* config/rs6000/e500crtrest32gpr.S: Remove.
	* config/rs6000/e500crtrest64gpr.S: Remove.
	* config/rs6000/e500crtresx32gpr.S: Remove.
	* config/rs6000/e500crtresx64gpr.S: Remove.
	* config/rs6000/e500crtsav32gpr.S: Remove.
	* config/rs6000/e500crtsav64gpr.S: Remove.
	* config/rs6000/e500crtsav64gprctr.S: Remove.
	* config/rs6000/e500crtsavg32gpr.S: Remove.
	* config/rs6000/e500crtsavg64gpr.S: Remove.
	* config/rs6000/e500crtsavg64gprctr.S: Remove.

The libgcc implementation of __clzhi2 can be tweaked by
one cycle in some situations by re-arranging the instructions.
It also reduces the WCET by 1 cycle.

libgcc/
	PR target/115065
	* config/avr/lib1funcs.S (__clzhi2): Tweak.

Implement __powisf2 in assembly.

	PR target/114981
libgcc/
	* config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add _powisf2.
	(LIB1ASMFUNCS) [!avrtiny]: Add _powif.
	* config/avr/lib1funcs.S (mov4): New .macro.
	(L_powif, __powisf2) [!avrtiny]: New module and function.

gcc/testsuite/
	* gcc.target/avr/pr114981-powif.c: New test.

This supports __powidf2 by means of a double wrapper for already
existing f7_powi (renamed to __f7_powi by f7-renames.h).
It tweaks the implementation so that it does not perform trivial
multiplications with 1.0 any more, but instead uses a move.
It also fixes the last statement of f7_powi, which was wrong.
Notice that f7_powi was unused until now.

	PR target/114981
libgcc/config/avr/libf7/
	* libf7-common.mk (F7_ASM_PARTS): Add D_powi
	* libf7-asm.sx (F7MOD_D_powi_, __powidf2): New module and function.
	* libf7.c (f7_powi): Fix last (wrong) statement.
	Tweak trivial multiplications with 1.0.

gcc/testsuite/
	* gcc.target/avr/pr114981-powil.c: New test.

Reuse MinGW definitions from i386 for libgcc. Move reused files to
libgcc/config/mingw folder.

libgcc/ChangeLog:

	* config.host: Add aarch64-w64-mingw32 target. Adjust targets
	after moving MinGW files.
	* config/i386/t-gthr-win32: Move to...
	* config/mingw/t-gthr-win32: ...here.
	* config/i386/t-mingw-pthread: Move to...
	* config/mingw/t-mingw-pthread: ...here.
	* config/aarch64/t-no-eh: New file. EH is not yet implemented for
	the target, and the default definition should be disabled.

libgcc/
	PR target/114835
	* config/avr/lib1funcs.S (__popcountqi2): Use code that
	is one instruction shorter / faster.

Support for Solaris 11.3 had already been obsoleted in GCC 13.  However,
since the only Solaris system in the cfarm was running 11.3, I've kept
it in tree until now when both Solaris 11.4/SPARC and x86 systems have
been added.

This patch actually removes the Solaris 11.3 support.  Apart from
several minor simplifications, there are two more widespread changes:

* In Solaris 11.4, libsocket and libnsl were folded into libc, so
  there's no longer a need to link them explictly.

* Since Solaris 11.4, Solaris includes all crts needed by gcc (like
  crt1.o and gcrt1.o) with the base system.  All workarounds to provide
  fallbacks can thus go.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 (as/ld, gas/ld, and gas/gld) as well as Solaris
11.3/x86 to ascertain that version is actually rejected.

2024-04-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	c++tools:
	* configure.ac (ax_lib_socket_nsl.m4): Don't sinclude.
	(AX_LIB_SOCKET_NSL): Don't call.
	(NETLIBS): Remove.
	* configure: Regenerate.
	* Makefile.in (NETLIBS): Remove.
	(g++-mapper-server$(exeext)): Remove $(NETLIBS).

	gcc:
	* config.gcc: Move *-*-solaris2.11.[0-3]* to unsupported list.
	<*-*-solaris2*> (default_use_cxa_atexit): Set unconditionally.
	* configure.ac (AX_LIB_SOCKET_NSL): Don't call.
	(NETLIBS): Remove.
	(gcc_cv_ld_aligned_shf_merge): Remove.
	(hidden_linkonce) <i?86-*-solaris2* | x86_64-*-solaris2*>: Remove.
	(gcc_cv_target_dl_iterate_phdr) <*-*-solaris2*>: Always set to yes.
	* Makefile.in (NETLIBS): Remove.
	* configure, config.in, aclocal.m4: Regenerate.
	* config/sol2.h: Don't check HAVE_SOLARIS_CRTS.
	(STARTFILE_SPEC): Remove !HAVE_SOLARIS_CRTS case.
	[USE_GLD] (LINK_EH_SPEC): Remove TARGET_DL_ITERATE_PHDR guard.
	* config/i386/i386.cc (USE_HIDDEN_LINKONCE): Remove guard.
	* varasm.cc (mergeable_string_section): Remove
	HAVE_LD_ALIGNED_SHF_MERGE handling.
	(mergeable_constant_section): Likewise.

	* doc/install.texi (Specific,i?86-*-solaris2*): Reference Solaris
	11.4 only.
	(Specific, *-*-solaris2*): Document Solaris 11.3 removal.  Remove
	11.3 references and caveats.  Update for 11.4.

	gcc/cp:
	* Make-lang.in (cc1plus$(exeext)): Remove $(NETLIBS).

	gcc/objcp:
	* Make-lang.in (cc1objplus$(exeext)): Remove $(NETLIBS).

	gcc/testsuite:
	* lib/target-supports.exp (check_effective_target_pie): Always
	enable on *-*-solaris2*.

	libgcc:
	* configure.ac <*-*-solaris2*> (libgcc_cv_solaris_crts): Remove.
	* config.host <*-*-solaris2*>: Remove !libgcc_cv_solaris_crts
	support.
	* configure, config.in: Regenerate.
	* config/sol2/gmon.c (internal_mcount) [!HAVE_SOLARIS_CRTS]: Remove.
	* config/i386/sol2-c1.S, config/sparc/sol2-c1.S: Remove.
	* config/sol2/t-sol2 (crt1.o, gcrt1.o): Remove.

	libstdc++-v3:
	* testsuite/lib/dg-options.exp (add_options_for_net_ts)
	<*-*-solaris2*>: Don't link with -lsocket -lnsl.

1 At point <https://github.com/riscv/riscv-bfloat16>,
  BF16 has already been completed "post public review".

2 LLVM has also added support for RISCV BF16 in
  <https://reviews.llvm.org/D151313> and
  <https://reviews.llvm.org/D150929>.

3 According to the discussion <https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/367

>,
  this use __bf16 and use DF16b in riscv_mangle_type like x86.

Below test are passed for this patch
    * The riscv fully regression test.

gcc/ChangeLog:

	* config/riscv/iterators.md: New mode iterator HFBF.
	* config/riscv/riscv-builtins.cc (riscv_init_builtin_types):
	Initialize data type _Bfloat16.
	* config/riscv/riscv-modes.def (FLOAT_MODE): New.
	(ADJUST_FLOAT_FORMAT): New.
	* config/riscv/riscv.cc (riscv_mangle_type): Support for BFmode.
	(riscv_scalar_mode_supported_p): Ditto.
	(riscv_libgcc_floating_mode_supported_p): Ditto.
	(riscv_init_libfuncs): Set the conversion method for BFmode and
	HFmode.
	(riscv_block_arith_comp_libfuncs_for_mode): Set the arithmetic
	and comparison libfuncs for the mode.
	* config/riscv/riscv.md (mode" ): Add BF.
	(movhf): Support for BFmode.
	(mov<mode>): Ditto.
	(*movhf_softfloat): Ditto.
	(*mov<mode>_softfloat): Ditto.

libgcc/ChangeLog:

	* config/riscv/sfp-machine.h (_FP_NANFRAC_B): New.
	(_FP_NANSIGN_B): Ditto.
	* config/riscv/t-softfp32: Add support for BF16 libfuncs.
	* config/riscv/t-softfp64: Ditto.
	* soft-fp/floatsibf.c: For si -> bf16.
	* soft-fp/floatunsibf.c: For unsi -> bf16.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/bf16_arithmetic.c: New test.
	* gcc.target/riscv/bf16_call.c: New test.
	* gcc.target/riscv/bf16_comparison.c: New test.
	* gcc.target/riscv/bf16_float_libcall_convert.c: New test.
	* gcc.target/riscv/bf16_integer_libcall_convert.c: New test.

Co-authored-by: Jin Ma <jinma@linux.alibaba.com>

The Intel Decimal Floating-Point Math Library is available as open-source on Netlib[1].

[1] https://www.netlib.org/misc/intel/

.

libgcc/config/libbid/ChangeLog:

	* bid128_fma.c (add_and_round): Fix bug: the result
	of (+5E+368)*(+10E-34)+(-10E+369) was returning
	-9999999999999999999999999999999999E+336 instead of expected
	result -1000000000000000000000000000000000E+337.
	(bid128_ext_fma): Ditto.
	(bid64qqq_fma): Ditto.
	* bid128_noncomp.c: Change return type of bid128_class from
	int to class_t.
	* bid128_round_integral.c: Add default case to avoid compiler
	warning.
	* bid128_string.c (bid128_to_string): Replace 0x30 with '0'
	for zero digit.
	(bid128_from_string): Ditto.
	* bid32_to_bid128.c (bid128_to_bid32): Fix Bug. In addition
	to the INEXACT flag, the UNDERFLOW flag needs to be set (and
	was not) when converting an input such as
	+6931674235302037148946035460357709E+1857 to +1000000E-101
	* bid32_to_bid64.c (bid64_to_bid32): fix Bug, In addition to
	the INEXACT flag, the UNDERFLOW flag needs to be set (and was
	not) when converting an input such as +9999999000000001E-111
	to +1000000E-101. Furthermore, significant bits of NaNs are
	set correctly now. For example,  0x7c00003b9aca0000 was
	returning 0x7c000002 instead of 0x 7c000100.
	* bid64_noncomp.c: Change return type of bid64_class from int
	to class_t.
	* bid64_round_integral.c (bid64_round_integral_exact): Add
	default case to avoid compiler warning.
	* bid64_string.c (bid64_from_string): Fix bug for rounding
	up. The input string "10000000000000000" was returning
	+1000000000000001E+1 instead of +1000000000000000E+1.
	* bid64_to_bid128.c (bid128_to_bid64): Fix bug, in addition to
	the INEXACT flag, the UNDERFLOW flag needs to be set (and was
	not) when converting an input such as
	+9999999999999999999999999999999999E-417 to
	+1000000000000000E-398.
	* bid_binarydecimal.c (bid32_to_binary64): Fix bug for
	conversion between binary and bid types. For example,
	0x7c0F4240 was returning 0x7FFFA12000000000 instead of
	expected double precision 0x7FF8000000000000.
	(binary64_to_bid32): Ditto.
	(binary80_to_bid32): Ditto.
	(binary128_to_bid32): Ditto.
	(binary80_to_bid64): Ditto.
	(binary128_to_bid64): Ditto.
	* bid_conf.h (BID_HIGH_128W): New macro.
	(BID_LOW_128W): Ditto.
	* bid_functions.h (__ENABLE_BINARY80__): Ditto.
	(ALIGN): Ditto.
	* bid_inline_add.h (get_add128): Add default case to avoid compiler
	warning.
	* bid_internal.h (get_BID64): Ditto.
	(fast_get_BID64_check_OF): Ditto.
	(ALIGN): New macro.

Co-authored-by: Anderson, Cristina S <cristina.s.anderson@intel.com>
Co-authored-by: Akkas, Ahmet <ahmet.akkas@intel.com>
Co-authored-by: Cornea, Marius <marius.cornea@intel.com>