- Jan 10, 2020
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Jakub Jelinek authored
PR tree-optimization/90838 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of CTZ_DEFINED_VALUE_AT_ZERO. From-SVN: r280140
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Vladimir Makarov authored
2020-01-10 Vladimir Makarov <vmakarov@redhat.com> PR inline-asm/93027 * gcc.target/i386/pr93027.c: Use the right PR number in the test. From-SVN: r280138
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Jakub Jelinek authored
PR libgomp/93219 * libgomp.h (gomp_print_string): Change return type from void to int. * affinity-fmt.c (gomp_print_string): Likewise. Return true if not all characters have been written. From-SVN: r280137
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Vladimir Makarov authored
From-SVN: r280136
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Vladimir Makarov authored
2020-01-10 Vladimir Makarov <vmakarov@redhat.com> PR inline-asm/93207 * gcc.target/i386/pr93207.c: Run it only for x86-64. From-SVN: r280135
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David Malcolm authored
This patch adds support for obscuring the line numbers printed in the left-hand margin when printing the source code, converting them to "NN", e.g from: 7111 | if (!(flags & 0x0001)) { | ^ | | | (1) following 'true' branch... 7112 | to: NN | if (!(flags & 0x0001)) { | ^ | | | (1) following 'true' branch... NN | This is useful in followup patches e.g. when testing how interprocedural paths are printed using multiline.exp, to avoid depending on precise line numbers. gcc/testsuite/ChangeLog: * lib/gcc-dg.exp (cleanup-after-saved-dg-test): Reset global nn_line_numbers_enabled. * lib/multiline.exp (nn_line_numbers_enabled): New global. (dg-enable-nn-line-numbers): New proc. (maybe-handle-nn-line-numbers): New proc. * lib/prune.exp (prune_gcc_output): Call maybe-handle-nn-line-numbers. From-SVN: r280134
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Vladimir Makarov authored
2020-01-10 Vladimir Makarov <vmakarov@redhat.com> PR inline-asm/93207 * lra-constraints.c (match_reload): Permit input operands have the same mode as output while other input operands have a different mode. 2020-01-10 Vladimir Makarov <vmakarov@redhat.com> PR inline-asm/93207 * gcc.target/i386/pr93207.c: New test. From-SVN: r280133
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Wilco Dijkstra authored
Support common idioms for count trailing zeroes using an array lookup. The canonical form is array[((x & -x) * C) >> SHIFT] where C is a magic constant which when multiplied by a power of 2 creates a unique value in the top 5 or 6 bits. This is then indexed into a table which maps it to the number of trailing zeroes. When the table is valid, we emit a sequence using the target defined value for ctz (0): int ctz1 (unsigned x) { static const char table[32] = { 0, 1, 28, 2, 29, 14, 24, 3, 30, 22, 20, 15, 25, 17, 4, 8, 31, 27, 13, 23, 21, 19, 16, 7, 26, 12, 18, 6, 11, 5, 10, 9 }; return table[((unsigned)((x & -x) * 0x077CB531U)) >> 27]; } Is optimized to: rbit w0, w0 clz w0, w0 and w0, w0, 31 ret gcc/ PR tree-optimization/90838 * tree-ssa-forwprop.c (check_ctz_array): Add new function. (check_ctz_string): Likewise. (optimize_count_trailing_zeroes): Likewise. (simplify_count_trailing_zeroes): Likewise. (pass_forwprop::execute): Try ctz simplification. * match.pd: Add matching for ctz idioms. testsuite/ PR tree-optimization/90838 * testsuite/gcc.target/aarch64/pr90838.c: New test. From-SVN: r280132
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Stam Markianos-Wright authored
gcc/ChangeLog: 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function for target hook. (aarch64_invalid_unary_op): New function for target hook. (aarch64_invalid_binary_op): New function for target hook. gcc/testsuite/ChangeLog: 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> * g++.target/aarch64/bfloat_cpp_typecheck.C: New test. * gcc.target/aarch64/bfloat16_scalar_typecheck.c: New test. * gcc.target/aarch64/bfloat16_vector_typecheck_1.c: New test. * gcc.target/aarch64/bfloat16_vector_typecheck_2.c: New test. From-SVN: r280130
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Stam Markianos-Wright authored
2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> * config.gcc: Add arm_bf16.h. * config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type): Add BFmode. (aarch64_init_simd_builtin_types): Define element types for vector types. (aarch64_init_bf16_types): New function. (aarch64_general_init_builtins): Add arm_init_bf16_types function call. * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector modes. * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types. * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move patterns. * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF. (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF. * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Add support for BF types. (aarch64_gimplify_va_arg_expr): Add support for BF types. (aarch64_vq_mode): Add support for BF types. (aarch64_simd_container_mode): Add support for BF types. (aarch64_mangle_type): Add support for BF scalar type. * config/aarch64/aarch64.md: Add BFmode to movhf pattern. * config/aarch64/arm_bf16.h: New file. * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types. * config/aarch64/iterators.md: Add BF types to mode attributes. (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New. 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com> * g++.dg/abi/mangle-neon-aarch64.C: Add Bfloat SIMD types to test. * g++.dg/ext/arm-bf16/bf16-mangle-aarch64-1.C: New test. * gcc.target/aarch64/bfloat16_scalar_1.c: New test. * gcc.target/aarch64/bfloat16_scalar_2.c: New test. * gcc.target/aarch64/bfloat16_scalar_3.c: New test. * gcc.target/aarch64/bfloat16_scalar_4.c: New test. * gcc.target/aarch64/bfloat16_simd_1.c: New test. * gcc.target/aarch64/bfloat16_simd_2.c: New test. * gcc.target/aarch64/bfloat16_simd_3.c: New test. From-SVN: r280129
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Jason Merrill authored
Back in SVN r131862 richi removed this code to fix PR 34235, but didn't remove the parallel code from the C front-end because the bug had previously been fixed in r44080. This patch copies the code from C again. * typeck.c (cp_build_binary_op): Restore short_shift code. From-SVN: r280128
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Jason Merrill authored
We don't unshare CONSTRUCTORs as often during constexpr evaluation, so we need to unshare them here. * constexpr.c (cxx_eval_outermost_constant_expr): Don't assume CONSTRUCTORs are already unshared. From-SVN: r280127
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Jason Merrill authored
My patch for 93033 wasn't sufficient to handle all the possible sharing introduced by split_nonconstant_init, and it occurred to me that it would make sense to use the same unsharing technique as unshare_body, namely copy_if_shared. PR c++/93033 gcc/ * gimplify.c (copy_if_shared): No longer static. * gimplify.h: Declare it. gcc/cp/ * cp-gimplify.c (cp_gimplify_init_expr, cp_gimplify_expr): Use copy_if_shared after cp_genericize_tree. * typeck2.c (split_nonconstant_init): Don't unshare here. From-SVN: r280126
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Richard Sandiford authored
related_vector_mode and compatible_vector_types_p make it possible to generate 128-bit SVE code while still maintaining the distinction between SVE vectors and Advanced SIMD vectors. We can therefore generate VL-specific code for -msve-vector-bits=128 on little-endian targets. In theory we could do the same for big-endian targets, but it could have quite a high overhead; see the comment in the patch for details. 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> gcc/ * doc/invoke.texi (-msve-vector-bits=): Document that -msve-vector-bits=128 now generates VL-specific code for little-endian targets. * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use build_vector_type_for_mode to construct the data vector types. * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate VL-specific code for -msve-vector-bits=128 on little-endian targets. (aarch64_simd_container_mode): Always prefer Advanced SIMD modes for 128-bit vectors. gcc/testsuite/ * gcc.target/aarch64/sve/struct_vect_1.c (N): Protect with #ifndef. * gcc.target/aarch64/sve/pcs/return_1_128.c: New test. * gcc.target/aarch64/sve/pcs/return_4_128.c: Likewise. * gcc.target/aarch64/sve/pcs/return_5_128.c: Likewise. * gcc.target/aarch64/sve/pcs/return_6_128.c: Likewise. * gcc.target/aarch64/sve/pcs/stack_clash_1_128.c: Likewise. * gcc.target/aarch64/sve/pcs/stack_clash_2_128.c: Likewise. * gcc.target/aarch64/sve/single_5.c: Likewise. * gcc.target/aarch64/sve/struct_vect_25.c: Likewise. * gcc.target/aarch64/sve/struct_vect_26.c: Likewise. From-SVN: r280125
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Martin Sebor authored
gcc/c-family/ChangeLog: PR c/93132 * c-attribs.c (append_access_attrs): Validate against the translated access string rather than the human-readable representation. gcc/testsuite/ChangeLog: PR c/93132 * gcc.dg/attr-access-read-only-2.c: New test. From-SVN: r280124
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Richard Sandiford authored
aarch64_evpc_sel (new in GCC 10) got the true and false vectors the wrong way round, leading to execution failures with fixed-length 128-bit SVE. Now that the ACLE types are in trunk, it's much easier to match the exact asm sequence for a permute. 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask invocation. gcc/testsuite/ * gcc.target/aarch64/sve/sel_1.c: Use SVE types for the arguments and return values. Use check-function-bodies instead of scan-assembler. * gcc.target/aarch64/sve/sel_2.c: Likewise * gcc.target/aarch64/sve/sel_3.c: Likewise. From-SVN: r280121
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Ian Lance Taylor authored
It's not part of the POSIX shell standard. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214300 From-SVN: r280118
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Jonathan Wakely authored
* testsuite/25_algorithms/equal/deque_iterators/1.cc: Don't use C++11 initialization syntax. From-SVN: r280117
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Jonathan Wakely authored
Since LWG 445 was implemented for GCC 4.7, the std::iterator base class of std::istreambuf_iterator changes type depending on the -std mode used. This creates an ABI incompatibility between different -std modes. This change ensures the base class always has the same type. This makes layout for C++98 compatible with the current -std=gnu++14 default, but no longer compatible with C++98 code from previous releases. In practice this is unlikely to cause real problems, because it only affects the layout of types with two std::iterator base classes, one of which comes from std::istreambuf_iterator. Such types are expected to be vanishingly rare. PR libstdc++/92285 * include/bits/streambuf_iterator.h (istreambuf_iterator): Make type of base class independent of __cplusplus value. [__cplusplus < 201103L] (istreambuf_iterator::reference): Override the type defined in the base class * testsuite/24_iterators/istreambuf_iterator/92285.cc: New test. * testsuite/24_iterators/istreambuf_iterator/requirements/ base_classes.cc: Adjust expected base class for C++98. From-SVN: r280116
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Tobias Burnus authored
2020-01-10 Gergö Barany <gergo@codesourcery.com> Thomas Schwinge <thomas@codesourcery.com> Julian Brown <julian@codesourcery.com> Tobias Burnus <tobias@codesourcery.com> gcc/c/ * c-parser.c (OACC_HOST_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_IF and PRAGMA_OACC_CLAUSE_IF_PRESENT. gcc/cp/ * parser.c (OACC_HOST_DATA_CLAUSE_MASK): Add PRAGMA_OACC_CLAUSE_IF and PRAGMA_OACC_CLAUSE_IF_PRESENT. gcc/fortran/ * openmp.c (OACC_HOST_DATA_CLAUSES): Add PRAGMA_OACC_CLAUSE_IF and PRAGMA_OACC_CLAUSE_IF_PRESENT. gcc/ * omp-low.c (lower_omp_target): Use GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT if PRAGMA_OACC_CLAUSE_IF_PRESENT exist. gcc/testsuite/ * c-c++-common/goacc/host_data-1.c: Added tests of if and if_present clauses on host_data. * gfortran.dg/goacc/host_data-tree.f95: Likewise. include/ * gomp-constants.h (enum gomp_map_kind): New enumeration constant GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT. libgomp/ * oacc-parallel.c (GOACC_data_start): Handle GOMP_MAP_USE_DEVICE_PTR_IF_PRESENT. * target.c (gomp_map_vars_async): Likewise. * testsuite/libgomp.oacc-c-c++-common/host_data-7.c: New. * testsuite/libgomp.oacc-fortran/host_data-5.F90: New. From-SVN: r280115
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Richard Sandiford authored
aarch64_builtin_vectorized_function checked vectors based on the number of elements and the element mode. This doesn't interact well with fixed-length 128-bit SVE, where SVE modes can have those same properties. (And we can't just use the built-ins for SVE because the types use a different ABI. SVE handles this kind of thing using optabs instead.) 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/aarch64-builtins.c (aarch64_builtin_vectorized_function): Check for specific vector modes, rather than checking the number of elements and the element mode. From-SVN: r280114
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Richard Sandiford authored
The related_vector_mode series missed this case in vect_create_epilog_for_reduction, where we want to create the unsigned integer equivalent of another vector. Without it we could mix SVE and Advanced SIMD vectors in the same operation. This showed up on existing tests when testing with fixed-length -msve-vector-bits=128. 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-loop.c (vect_create_epilog_for_reduction): Use get_related_vectype_for_scalar_type rather than build_vector_type to create the index type for a conditional reduction. From-SVN: r280112
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Richard Sandiford authored
update_epilogue_loop_vinfo applies SSA renmaing to the DR_REF of a gather or scatter, so that vect_check_gather_scatter continues to work. However, we sometimes also rely on vect_check_gather_scatter when using gathers and scatters to implement strided accesses. This showed up on existing tests when testing with fixed-length -msve-vector-bits=128. 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF for any type of gather or scatter, including strided accesses. From-SVN: r280111
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Ian Lance Taylor authored
This is a language change for Go 1.14. Updates golang/go#6977 Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214240 From-SVN: r280109
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Andre Vieira authored
gcc/ChangeLog: 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com> * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function comment. From-SVN: r280108
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Andre Vieira authored
gcc/ChangeLog: 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com> * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use get_dr_vinfo_offset * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init parameter and its use to reset DR_OFFSET's. (vect_transform_loop): Remove orig_drs_init argument. * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset member of dr_vec_info rather than the offset of the associated data_reference's innermost_loop_behavior. (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference. (vect_do_peeling): Remove orig_drs_init parameter and its construction. * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with get_dr_vinfo_offset. (vectorizable_store): Likewise. (vectorizable_load): Likewise. From-SVN: r280107
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Richard Biener authored
* gimple-ssa-store-merging (pass_store_merging::terminate_all_aliasing_chains): Cache alias info. From-SVN: r280106
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Martin Jambor authored
2020-01-10 Martin Jambor <mjambor@suse.cz> * gcc.dg/ipa/ipa-clone-3.c: Replace struct initializer with piecemeal initialization. From-SVN: r280105
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Richard Sandiford authored
One of the SVE run tests was specific to 256-bit SVE but tried to run for all SVE lengths. 2020-01-10 Richard Sandiford <richard.sandiford@arm.com> gcc/testsuite/ * gcc.target/aarch64/sve/index_1_run.c: Require aarch64_sve256_hw rather than aarch64_sve_hw. From-SVN: r280104
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Martin Liska authored
2020-01-10 Martin Liska <mliska@suse.cz> PR ipa/93217 * ipa-inline-analysis.c (offline_size): Make proper parenthesis encapsulation that was there before r280040. From-SVN: r280103
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Richard Biener authored
2020-01-10 Richard Biener <rguenther@suse.de> PR middle-end/93199 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL sequences to avoid walking them again for secondary opportunities. (pass_lower_eh_dispatch::execute): Instead actually insert them here. From-SVN: r280102
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Richard Biener authored
2020-01-10 Richard Biener <rguenther@suse.de> PR middle-end/93199 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible. (cleanup_all_empty_eh): Walk landing pads in reverse order to avoid quadraticness. From-SVN: r280101
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Martin Jambor authored
2020-01-10 Martin Jambor <mjambor@suse.cz> * params.opt (param_ipa_sra_max_replacements): Mark as Optimization. * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it to get param_ipa_sra_max_replacements. (param_splitting_across_edge): Pass the caller to pull_accesses_from_callee. From-SVN: r280100
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Martin Jambor authored
2020-01-10 Martin Jambor <mjambor@suse.cz> * params.opt (param_ipcp_unit_growth): Mark as Optimization. * ipa-cp.c (max_new_size): Removed. (orig_overall_size): New variable. (get_max_overall_size): New function. (estimate_local_effects): Use it. Adjust dump. (decide_about_value): Likewise. (ipcp_propagate_stage): Do not calculate max_new_size, just store orig_overall_size. Adjust dump. (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size. From-SVN: r280099
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Martin Jambor authored
2020-01-10 Martin Jambor <mjambor@suse.cz> * params.opt (param_ipa_max_agg_items): Mark as Optimization * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use instead of param_ipa_max_agg_items. (merge_aggregate_lattices): Extract param_ipa_max_agg_items from optimization info for the callee. From-SVN: r280098
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Richard Biener authored
2020-01-10 Richard Biener <rguenther@suse.de> PR testsuite/93216 * gcc.dg/optimize-bswaphi-1.c: Split previously added case into a LE and BE variant. From-SVN: r280097
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GCC Administrator authored
From-SVN: r280096
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- Jan 09, 2020
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Ian Lance Taylor authored
Previously if the only names defined by _test packages were examples, the gotest script would emit an incorrect _testmain.go file. I worked around that by marking the example_test.go files +build ignored. This CL changes the gotest script to handle this case correctly, and removes the now-unnecessary build tags. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214039 From-SVN: r280085
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Olivier Hainque authored
2020-01-09 Olivier Hainque <hainque@adacore.com> * doc/xml/manual/appendix_contributing.xml: Document _C2 as a reserved identifier, by VxWorks. * include/bits/stl_map.h: Rename _C2 template typenames as _Cmp2. * include/bits/stl_multimap.h: Likewise. From-SVN: r280076
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Jonathan Wakely authored
The equality operators for _ExtPtr_allocator are defined as non-const member functions, which causes ambiguities in C++20 due to the synthesized operator!= candidates. They should always have been const. The _Pointer_adapter class template has both value_type and element_type members, which makes readable_traits<_Pointer_adapter<T>> ambiguous. The intended workaround is to add a specialization of readable_traits. * include/ext/extptr_allocator.h (_ExtPtr_allocator::operator==) (_ExtPtr_allocator::operator!=): Add missing const qualifiers. * include/ext/pointer.h (readable_traits<_Pointer_adapter<S>>): Add partial specialization to disambiguate the two constrained specializations. From-SVN: r280067
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