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Jin Ma authored
When the vsetvl instructions of the two RVV instructions are merged
using "use_max_sew", it is possible to update the sew of prev if
prev.sew < next.sew, but keep the original ratio, which is obviously
wrong. when the subsequent instructions are equal to the wrong ratio,
it is possible to generate the wrong "vsetvli zero,zero" instruction,
which will lead to unknown avl.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (demand_system::use_max_sew): Also
	set the ratio for PREV.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/bug-10.c: New test.
8d577a01
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