This adds zero else operands to masked loads and their intrinsics.
I needed to adjust more than initially thought because we rely on
combine for several instructions and a change in a "base" pattern
needs to propagate to all those.

gcc/ChangeLog:

	* config/aarch64/aarch64-sve-builtins-base.cc: Add else
	handling.
	* config/aarch64/aarch64-sve-builtins.cc (function_expander::use_contiguous_load_insn):
	Ditto.
	* config/aarch64/aarch64-sve-builtins.h: Add else operand to
	contiguous load.
	* config/aarch64/aarch64-sve.md (@aarch64_load<SVE_PRED_LOAD:pred_load>
	_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>):
	Split and add else operand.
	(@aarch64_load_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>):
	Ditto.
	(*aarch64_load_<ANY_EXTEND:optab>_mov<SVE_HSDI:mode><SVE_PARTIAL_I:mode>):
	Ditto.
	* config/aarch64/aarch64-sve2.md: Ditto.
	* config/aarch64/iterators.md: Remove unused iterators.
	* config/aarch64/predicates.md (aarch64_maskload_else_operand):
	Add zero else operand.