testsuite: RISC-V: Skip V and Zvbb tests for ILP32E/ILP64E ABIs

Some tests add options for V and Zvbb extensions, but those extensions
are not compatible with the E ABI variants.  This leads to spurious test
failures when toolchain's default ABI is ILP32E or ILP64E:

  spawn ... -march=rv32ecv_zvbb ...
  cc1: error: ILP32E ABI does not support the 'D' extension
  cc1: sorry, unimplemented: Currently the 'V' implementation requires the 'M' extension

Fix by skipping the tests when toolchain's default ABI is E variant.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vandn-1.c: Skip if default
	is E ABI.
	* gcc.target/riscv/rvv/autovec/binop/vrolr-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vwsll-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vwsll-template.h: Ditto.
	* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12-zvbb.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/clz-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/ctz-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/popcount-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/popcount-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/popcount-3.c: Ditto.
	* gcc.target/riscv/rvv/base/cmpmem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/cmpmem-3.c: Ditto.
	* gcc.target/riscv/rvv/base/cmpmem-4.c: Ditto.
	* gcc.target/riscv/rvv/base/cpymem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/cpymem-2.c: Ditto.
	* gcc.target/riscv/rvv/base/cpymem-3.c: Ditto.
	* gcc.target/riscv/rvv/base/movmem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/pr115068.c: Ditto.
	* gcc.target/riscv/rvv/base/setmem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/setmem-2.c: Ditto.
	* gcc.target/riscv/rvv/base/setmem-3.c: Ditto.
	* gcc.target/riscv/rvv/base/vwaddsub-1.c: Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>