The following invoke signed integer overflow (UB) [1]:

  month   + months{MAX} // where MAX is the maximum value of months::rep
  month   + months{MIN} // where MIN is the maximum value of months::rep
  month   - months{MIN} // where MIN is the minimum value of months::rep
  weekday + days  {MAX} // where MAX is the maximum value of days::rep
  weekday - days  {MIN} // where MIN is the minimum value of days::rep

For the additions to MAX, the crux of the problem is that, in libstdc++,
months::rep and days::rep are int64_t. Other implementations use int32_t, cast
operands to int64_t and perform arithmetic operations without risk of
overflowing.

For month + months{MIN}, the implementation follows the Standard's "returns
clause" and evaluates:

   modulo(static_cast<long long>(unsigned{__x}) + (__y.count() - 1), 12);

Overflow occurs when MIN - 1 is evaluated. Casting to a larger type could help
but, unfortunately again, this is not possible for libstdc++.

For the subtraction of MIN, the problem is that -MIN is not representable.

It's fair to say that the intention is for these additions/subtractions to
be performed in modulus (12 or 7) arithmetic so that no overflow is expected.

To fix these UB, this patch implements:

  template <unsigned __d, typename _T>
  unsigned __add_modulo(unsigned __x, _T __y);

  template <unsigned __d, typename _T>
  unsigned __sub_modulo(unsigned __x, _T __y);

which respectively, returns the remainder of Euclidean division of, __x + __y
and __x - __y by __d without overflowing. These functions replace

  constexpr unsigned __modulo(long long __n, unsigned __d);

which also calculates the reminder of __n, where __n is the result of the
addition or subtraction. Hence, these operations might invoke UB before __modulo
is called and thus, __modulo can't do anything to remediate the issue.

In addition to solve the UB issues, __add_modulo and __sub_modulo allow better
codegen (shorter and branchless) on x86-64 and ARM [2].

[1] https://godbolt.org/z/a9YfWdn57
[2] https://godbolt.org/z/Gh36cr7E4

libstdc++-v3/ChangeLog:

	* include/std/chrono: Fix + and - for months and weekdays.
	* testsuite/std/time/month/1.cc: Add constexpr tests against overflow.
	* testsuite/std/time/month/2.cc: New test for extreme values.
	* testsuite/std/time/weekday/1.cc: Add constexpr tests against overflow.
	* testsuite/std/time/weekday/2.cc: New test for extreme values.

As noted in the PR, we can use if-constexpr for the explicit
instantantiation definitions that are compiled with -std=gnu++11. We
just need to disable the -Wc++17-extensions diagnostics.

libstdc++-v3/ChangeLog:

	PR libstdc++/113099
	* include/bits/locale_classes.tcc (__try_use_facet): Use
	if-constexpr for C++11 and up.

The following testcase ICEs when rslt is SSA_NAME_OCCURS_IN_ABNORMAL_PHI
and we call replace_uses_by with a INTEGER_CST def, where it ICEs on:
              if (e->flags & EDGE_ABNORMAL
                  && !SSA_NAME_OCCURS_IN_ABNORMAL_PHI (val))
because val is not an SSA_NAME.  One way would be to add
                  && TREE_CODE (val) == SSA_NAME
check in between the above 2 lines in replace_uses_by.

And/or the following patch just punts propagating constants to
SSA_NAME_OCCURS_IN_ABNORMAL_PHI rslt uses.

Or we could punt somewhere earlier in final value replacement (but dunno
where).

2024-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113201
	* tree-scalar-evolution.cc (final_value_replacement_loop): Don't call
	replace_uses_by on SSA_NAME_OCCURS_IN_ABNORMAL_PHI rslt.

	* gcc.c-torture/compile/pr113201.c: New test.

We expand __builtin_popcount* (x) == 1 as
x ^ (x - 1) > x - 1, either unconditionally in tree-ssa-math-opts.cc
if we don't have a direct optab support for popcount, or during
expansion where we compare the costs of comparison of the popcount
against one vs. the above expression.
As mentioned in the PR, if we know from ranger that the argument is
not zero, we can emit x & (x - 1) == 0 test which is same number of
GIMPLE statements, but on many targets cheaper (e.g. whenever an AND
instruction can also set flags on whether result was zero or not).

The following patch does that.

2024-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/90693
	* tree-ssa-math-opts.cc (match_single_bit_test): If
	tree_expr_nonzero_p (arg), remember it in the second argument to
	IFN_POPCOUNT or lower it as arg & (arg - 1) == 0 rather than
	arg ^ (arg - 1) > arg - 1.
	* internal-fn.cc (expand_POPCOUNT): If second argument to
	IFN_POPCOUNT suggests arg is non-zero, try to expand it as
	arg & (arg - 1) == 0 rather than arg ^ (arg - 1) > arg - 1.

	* gcc.target/i386/pr90693-2.c: New test.

I just replace the wrong logic in last clean up...

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/partial/single_rgroup-2.h:
	Fix the check condition.

- Drop unnecessary including for stdlib.h and math.h
- Drop assert.h / assert, use __builtin_abort instead.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h:
	Use __builtin_abort instead of assert.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-1.c: Drop math.h.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmax_zvfh-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/cond/cond_fmin_zvfh-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/single_rgroup-2.h: Use
	__builtin_abort instead of assert.
	* gcc.target/riscv/rvv/autovec/pr112694-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/partial/single_rgroup-3.h: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/abs-template.h: Drop stdlib.h.
	* gcc.target/riscv/rvv/autovec/unop/vneg-template.h: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/vnot-template.h: Ditto.

gcc/ChangeLog:

	* config/riscv/riscv-v.cc (expand_load_store):
	Remove `value`.
	(expand_cond_len_op): Ditto.
	(expand_gather_scatter): Ditto.
	(expand_lanes_load_store): Ditto.
	(expand_fold_extract_last): Ditto.

This reverts commit b3ec98d4.

This reverts commit 960c2620.

This patch add crypto vector api-testing cases based on
https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/eopc/vector-crypto/auto-generated/vector-crypto
gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/zvbb-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvbb_vandn_vx_constraint.c: New test.
	* gcc.target/riscv/rvv/base/zvbc-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvbc_vx_constraint-1.c: New test.
	* gcc.target/riscv/rvv/base/zvbc_vx_constraint-2.c: New test.
	* gcc.target/riscv/rvv/base/zvkg-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvkned-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvknha-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvknhb-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvksed-intrinsic.c: New test.
	* gcc.target/riscv/rvv/base/zvksh-intrinsic.c: New test.
	* gcc.target/riscv/zvkb.c: New test.

This patch add the intrinsic funtions of crypto vector based on the
intrinsic doc(https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob
/eopc/vector-crypto/auto-generated/vector-crypto/intrinsic_funcs.md).

Co-Authored by: Songhe Zhu <zhusonghe@eswincomputing.com>
Co-Authored by: Ciyan Pan <panciyan@eswincomputing.com>
gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-bases.cc (class vandn):
				Add new function_base for crypto vector.
	(class bitmanip): Ditto.
	(class b_reverse):Ditto.
	(class vwsll):   Ditto.
	(class clmul):   Ditto.
	(class vg_nhab):  Ditto.
	(class crypto_vv):Ditto.
	(class crypto_vi):Ditto.
	(class vaeskf2_vsm3c):Ditto.
	(class vsm3me): Ditto.
	(BASE): Add BASE declaration for crypto vector.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
				Add crypto vector intrinsic definition.
	(vbrev): Ditto.
	(vclz): Ditto.
	(vctz): Ditto.
	(vwsll): Ditto.
	(vandn): Ditto.
	(vbrev8): Ditto.
	(vrev8): Ditto.
	(vrol): Ditto.
	(vror): Ditto.
	(vclmul): Ditto.
	(vclmulh): Ditto.
	(vghsh): Ditto.
	(vgmul): Ditto.
	(vaesef): Ditto.
	(vaesem): Ditto.
	(vaesdf): Ditto.
	(vaesdm): Ditto.
	(vaesz): Ditto.
	(vaeskf1): Ditto.
	(vaeskf2): Ditto.
	(vsha2ms): Ditto.
	(vsha2ch): Ditto.
	(vsha2cl): Ditto.
	(vsm4k): Ditto.
	(vsm4r): Ditto.
	(vsm3me): Ditto.
	(vsm3c): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
				Add new function_shape for crypto vector.
	(struct crypto_vi_def): Ditto.
	(struct crypto_vv_no_op_type_def): Ditto.
	(SHAPE): Add SHAPE declaration of crypto vector.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data type for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	(vuint32m8_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data struct for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
	* config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.

This patch uses _GLIBCXX_USE_BUILTIN_TRAIT macro instead of __has_builtin
in the type_traits header for traits that have a corresponding fallback
non-built-in implementation.  This macro supports to toggle the use of
built-in traits in the type_traits header through
_GLIBCXX_DO_NOT_USE_BUILTIN_TRAITS macro, without needing to modify the
source code.

libstdc++-v3/ChangeLog:

	* include/std/type_traits: Use _GLIBCXX_USE_BUILTIN_TRAIT.

Signed-off-by: Ken Matsui <kmatsui@gcc.gnu.org>
Reviewed-by: Patrick Palka <ppalka@redhat.com>
Reviewed-by: Jonathan Wakely <jwakely@redhat.com>

Consider this following case:

void
f (int *restrict a, int *restrict b, int *restrict c, int *restrict d, int n)
{
  for (int i = 0; i < n; i++)
    {
      int tmp = b[i] + 15;
      int tmp2 = tmp + b[i];
      c[i] = tmp2 + b[i];
      d[i] = tmp + tmp2 + b[i];
    }
}

Current dynamic LMUL cost model choose LMUL = 4 because we count the "15" as
consuming 1 vector register group which is not accurate.

We teach the dynamic LMUL cost model be aware of the potential vi variant instructions
transformation, so that we can choose LMUL = 8 according to more accurate cost model.

After this patch:

f:
	ble	a4,zero,.L5
.L3:
	vsetvli	a5,a4,e32,m8,ta,ma
	slli	a0,a5,2
	vle32.v	v16,0(a1)
	vadd.vi	v24,v16,15
	vadd.vv	v8,v24,v16
	vadd.vv	v0,v8,v16
	vse32.v	v0,0(a2)
	vadd.vv	v8,v8,v24
	vadd.vv	v8,v8,v16
	vse32.v	v8,0(a3)
	add	a1,a1,a0
	add	a2,a2,a0
	add	a3,a3,a0
	sub	a4,a4,a5
	bne	a4,zero,.L3
.L5:
	ret

Tested on both RV32 and RV64 no regression.

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c: New test.

For boolean types, `a ^ b` is a valid form for `a != b`. This means for
gimple_bitwise_inverted_equal_p, we catch some inverted value forms. This
patch extends inverted_equal_p to allow matching of `^` with the
corresponding `==`. Note in the testcase provided we used to optimize
in GCC 12 to just `return 0` where `a == b` was used,
this allows us to do that again.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

	PR tree-optimization/113186

gcc/ChangeLog:

	* gimple-match-head.cc (gimple_bitwise_inverted_equal_p):
	Match `^` with the `==` for 1bit integral types.
	* match.pd (maybe_cmp): Allow for bit_xor for 1bit
	integral types.

gcc/testsuite/ChangeLog:

	* gcc.dg/tree-ssa/bitops-bool-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

libstdc++-v3/ChangeLog:

	* include/std/generator (_Subyield_state::_M_jump_in): Fix typo
	reported by Will Hawkins <hawkinsw@obs.cr>.

libstdc++-v3/ChangeLog:

	* include/std/generator (_Stateless_alloc): Rename typename _A
	to _All.

This commit adds a new function intended for checking the XID properties
of a possibly unicode character, as well as the accompanying enum
describing the possible properties.

libcpp/ChangeLog:

	* charset.cc (cpp_check_xid_property): New.
	* include/cpplib.h
	(cpp_check_xid_property): New.
	(enum cpp_xid_property): New.

Signed-off-by: Raiki Tamura <tamaron1203@gmail.com>

Changed in v2:
- split out from the code that generates options-urls.cc
- call the generated function, rather than use a generated array
- pass around lang_mask

gcc/ChangeLog:
	* diagnostic.h (diagnostic_make_option_url_cb): Add lang_mask
	param.
	(diagnostic_context::make_option_url): Update for lang_mask param.
	* gcc-urlifier.cc: Include "opts.h" and "options.h".
	(gcc_urlifier::gcc_urlifier): Add lang_mask param.
	(gcc_urlifier::m_lang_mask): New field.
	(doc_urls): Make static.
	(gcc_urlifier::get_url_for_quoted_text): Use label_text.
	(gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
	Look for an option by name before trying a binary search in
	doc_urls.
	(gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
	(gcc_urlifier::get_url_suffix_for_option): New.
	(make_gcc_urlifier): Add lang_mask param.
	(selftest::gcc_urlifier_cc_tests): Update for above changes.
	Verify that a URL is found for "-fpack-struct".
	* gcc-urlifier.def: Drop options "--version" and "-fpack-struct".
	* gcc-urlifier.h (make_gcc_urlifier): Add lang_mask param.
	* gcc.cc (driver::global_initializations): Pass 0 for lang_mask
	to make_gcc_urlifier.
	* opts-diagnostic.h (get_option_url): Add lang_mask param.
	* opts.cc (get_option_html_page): Remove special-casing for
	analyzer and LTO.
	(get_option_url_suffix): New.
	(get_option_url): Reimplement.
	(selftest::test_get_option_html_page): Rename to...
	(selftest::test_get_option_url_suffix): ...this and update for
	above changes.
	(selftest::opts_cc_tests): Update for renaming.
	* opts.h: Include "rich-location.h".
	(get_option_url_suffix): New decl.

gcc/testsuite/ChangeLog:
	* lib/gcc-dg.exp: Set TERM to xterm.

gcc/ChangeLog:
	* toplev.cc (general_init): Pass lang_mask to urlifier.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

Changed in v2:
- split out from the code that uses this
- now handles lang-specific URLs, as well as generic URLs
- the generated options-urls.cc now contains a function with a
  switch statement, rather than an array, to support
  lang-specific URLs:

const char *
get_opt_url_suffix (int option_index, unsigned lang_mask)
{
  switch (option_index)
    {
     [...snip...]
     case OPT_B:
       if (lang_mask & CL_D)
         return "gdc/Directory-Options.html#index-B";
       return "gcc/Directory-Options.html#index-B";
    [...snip...]
  return nullptr;
}

gcc/ChangeLog:
	* Makefile.in (ALL_OPT_URL_FILES): New.
	(GCC_OBJS): Add options-urls.o.
	(OBJS): Likewise.
	(OBJS-libcommon): Likewise.
	(s-options): Depend on $(ALL_OPT_URL_FILES), and add this to
	inputs to opt-gather.awk.
	(options-urls.cc): New Makefile target.
	* opt-functions.awk (url_suffix): New function.
	(lang_url_suffix): New function.
	* options-urls-cc-gen.awk: New file.
	* opts.h (get_opt_url_suffix): New decl.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

Changed in v5: regenerated
Changed in v4: regenerated
Changed in v3: regenerated
Changed in v2: the files now contain some lang-specific URLs.

gcc/ada/ChangeLog:
	* gcc-interface/lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/analyzer/ChangeLog:
	* analyzer.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/c-family/ChangeLog:
	* c.opt.urls: New file, autogenerated by regenerate-opt-urls.py.

gcc/ChangeLog:
	* common.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.
	* config/aarch64/aarch64.opt.urls: Likewise.
	* config/alpha/alpha.opt.urls: Likewise.
	* config/alpha/elf.opt.urls: Likewise.
	* config/arc/arc-tables.opt.urls: Likewise.
	* config/arc/arc.opt.urls: Likewise.
	* config/arm/arm-tables.opt.urls: Likewise.
	* config/arm/arm.opt.urls: Likewise.
	* config/arm/vxworks.opt.urls: Likewise.
	* config/avr/avr.opt.urls: Likewise.
	* config/bpf/bpf.opt.urls: Likewise.
	* config/c6x/c6x-tables.opt.urls: Likewise.
	* config/c6x/c6x.opt.urls: Likewise.
	* config/cris/cris.opt.urls: Likewise.
	* config/cris/elf.opt.urls: Likewise.
	* config/csky/csky.opt.urls: Likewise.
	* config/csky/csky_tables.opt.urls: Likewise.
	* config/darwin.opt.urls: Likewise.
	* config/dragonfly.opt.urls: Likewise.
	* config/epiphany/epiphany.opt.urls: Likewise.
	* config/fr30/fr30.opt.urls: Likewise.
	* config/freebsd.opt.urls: Likewise.
	* config/frv/frv.opt.urls: Likewise.
	* config/ft32/ft32.opt.urls: Likewise.
	* config/fused-madd.opt.urls: Likewise.
	* config/g.opt.urls: Likewise.
	* config/gcn/gcn.opt.urls: Likewise.
	* config/gnu-user.opt.urls: Likewise.
	* config/h8300/h8300.opt.urls: Likewise.
	* config/hpux11.opt.urls: Likewise.
	* config/i386/cygming.opt.urls: Likewise.
	* config/i386/cygwin.opt.urls: Likewise.
	* config/i386/djgpp.opt.urls: Likewise.
	* config/i386/i386.opt.urls: Likewise.
	* config/i386/mingw-w64.opt.urls: Likewise.
	* config/i386/mingw.opt.urls: Likewise.
	* config/i386/nto.opt.urls: Likewise.
	* config/ia64/ia64.opt.urls: Likewise.
	* config/ia64/ilp32.opt.urls: Likewise.
	* config/ia64/vms.opt.urls: Likewise.
	* config/iq2000/iq2000.opt.urls: Likewise.
	* config/linux-android.opt.urls: Likewise.
	* config/linux.opt.urls: Likewise.
	* config/lm32/lm32.opt.urls: Likewise.
	* config/loongarch/loongarch.opt.urls: Likewise.
	* config/lynx.opt.urls: Likewise.
	* config/m32c/m32c.opt.urls: Likewise.
	* config/m32r/m32r.opt.urls: Likewise.
	* config/m68k/ieee.opt.urls: Likewise.
	* config/m68k/m68k-tables.opt.urls: Likewise.
	* config/m68k/m68k.opt.urls: Likewise.
	* config/m68k/uclinux.opt.urls: Likewise.
	* config/mcore/mcore.opt.urls: Likewise.
	* config/microblaze/microblaze.opt.urls: Likewise.
	* config/mips/mips-tables.opt.urls: Likewise.
	* config/mips/mips.opt.urls: Likewise.
	* config/mips/sde.opt.urls: Likewise.
	* config/mmix/mmix.opt.urls: Likewise.
	* config/mn10300/mn10300.opt.urls: Likewise.
	* config/moxie/moxie.opt.urls: Likewise.
	* config/msp430/msp430.opt.urls: Likewise.
	* config/nds32/nds32-elf.opt.urls: Likewise.
	* config/nds32/nds32-linux.opt.urls: Likewise.
	* config/nds32/nds32.opt.urls: Likewise.
	* config/netbsd-elf.opt.urls: Likewise.
	* config/netbsd.opt.urls: Likewise.
	* config/nios2/elf.opt.urls: Likewise.
	* config/nios2/nios2.opt.urls: Likewise.
	* config/nvptx/nvptx-gen.opt.urls: Likewise.
	* config/nvptx/nvptx.opt.urls: Likewise.
	* config/openbsd.opt.urls: Likewise.
	* config/or1k/elf.opt.urls: Likewise.
	* config/or1k/or1k.opt.urls: Likewise.
	* config/pa/pa-hpux.opt.urls: Likewise.
	* config/pa/pa-hpux1010.opt.urls: Likewise.
	* config/pa/pa-hpux1111.opt.urls: Likewise.
	* config/pa/pa-hpux1131.opt.urls: Likewise.
	* config/pa/pa.opt.urls: Likewise.
	* config/pa/pa64-hpux.opt.urls: Likewise.
	* config/pdp11/pdp11.opt.urls: Likewise.
	* config/pru/pru.opt.urls: Likewise.
	* config/riscv/riscv.opt.urls: Likewise.
	* config/rl78/rl78.opt.urls: Likewise.
	* config/rpath.opt.urls: Likewise.
	* config/rs6000/476.opt.urls: Likewise.
	* config/rs6000/aix64.opt.urls: Likewise.
	* config/rs6000/darwin.opt.urls: Likewise.
	* config/rs6000/linux64.opt.urls: Likewise.
	* config/rs6000/rs6000-tables.opt.urls: Likewise.
	* config/rs6000/rs6000.opt.urls: Likewise.
	* config/rs6000/sysv4.opt.urls: Likewise.
	* config/rtems.opt.urls: Likewise.
	* config/rx/elf.opt.urls: Likewise.
	* config/rx/rx.opt.urls: Likewise.
	* config/s390/s390.opt.urls: Likewise.
	* config/s390/tpf.opt.urls: Likewise.
	* config/sh/sh.opt.urls: Likewise.
	* config/sh/superh.opt.urls: Likewise.
	* config/sol2.opt.urls: Likewise.
	* config/sparc/long-double-switch.opt.urls: Likewise.
	* config/sparc/sparc.opt.urls: Likewise.
	* config/stormy16/stormy16.opt.urls: Likewise.
	* config/v850/v850.opt.urls: Likewise.
	* config/vax/elf.opt.urls: Likewise.
	* config/vax/vax.opt.urls: Likewise.
	* config/visium/visium.opt.urls: Likewise.
	* config/vms/vms.opt.urls: Likewise.
	* config/vxworks-smp.opt.urls: Likewise.
	* config/vxworks.opt.urls: Likewise.
	* config/xtensa/elf.opt.urls: Likewise.
	* config/xtensa/uclinux.opt.urls: Likewise.
	* config/xtensa/xtensa.opt.urls: Likewise.

gcc/d/ChangeLog:
	* lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/fortran/ChangeLog:
	* lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/go/ChangeLog:
	* lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/lto/ChangeLog:
	* lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/m2/ChangeLog:
	* lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/ChangeLog:
	* params.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

gcc/rust/ChangeLog:
	* lang.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

In r14-5118-gc5db4d8ba5f3de I added a mechanism to automatically add
URLs to quoted strings in diagnostics.  This was based on a data table
mapping strings to URLs, with placeholder data covering various pragmas
and a couple of options.

The following patches add automatic URLification in our diagnostic
messages to mentions of *all* of our options in quoted strings, linking
to our HTML documentation.

For example, with these patches, given:

  ./xgcc -B. -S t.c -Wctad-maybe-unsupported
  cc1: warning: command-line option ‘-Wctad-maybe-unsupported’ is valid for C++/ObjC++ but not for C

the quoted string '-Wctad-maybe-unsupported' gets automatically URLified
in a sufficiently modern terminal to:
  https://gcc.gnu.org/onlinedocs/gcc/C_002b_002b-Dialect-Options.html#index-Wctad-maybe-unsupported



Objectives:
- integrate with DOCUMENTATION_ROOT_URL
- integrate with the existing .opt mechanisms
- automate keeping the URLs up-to-date
- work with target-specific options based on current configuration
- work with lang-specific options based on current configuration
- keep autogenerated material separate from the human-maintained .opt
  files
- no new build-time requirements (by using awk at build time)
- be maintainable

The approach is a new regenerate-opt-urls.py which:
- scrapes the generated HTML documentation finding anchors
  for options,
- reads all the .opt files in the source tree
- for each .opt file, generates a .opt.urls file; for each
  option in the .opt file it has either a UrlSuffix directives giving
  the final part of the URL of that option's documentation (relative
  to DOCUMENTATION_ROOT_URL), or a comment describing the problem.

regenerate-opt-urls.py is written in Python 3, and has unit tests.
I tested it with Python 3.8, and it probably works with earlier
releases of Python 3.
The .opt.urls files it generates become part of the source tree, and
would be regenerated by maintainers whenever new options are added.
Forgetting to update the files (or not having Python 3 handy) merely
means that URLs might be missing or out of date until someone else
regenerates them.

At build time, the .opt.urls are added to .opt files when regenerating
the optionslist file.  A new "options-urls-cc-gen.awk" is run at build
time on the optionslist to generate a "options-urls.cc" file, and this
is then used by the gcc_urlifier class when emitting diagnostics.

Changed in v5:
- removed commented-out code

Changed in v4:
- added PER_LANGUAGE_OPTION_INDEXES
- added info to sourcebuild.texi on adding a new front end
- removed TODOs and out-of-date comment

Changed in v3:
- Makefile.in: added OPT_URLS_HTML_DEPS and a comment

Changed in v2:
- added convenience targets to Makefile for regenerating the .opt.urls
  files, and for running unit tests for the generation code
- parse gdc and gfortran documentation, and create LangUrlSuffix_{lang}
directives for language-specific URLs.
- add documentation to sourcebuild.texi

gcc/ChangeLog:
	* Makefile.in (OPT_URLS_HTML_DEPS): New.
	(regenerate-opt-urls): New target.
	(regenerate-opt-urls-unit-test): New target.
	* doc/options.texi (Option properties): Add UrlSuffix and
	description of regenerate-opt-urls.py.  Add LangUrlSuffix_*.
	* doc/sourcebuild.texi (Anatomy of a Language Front End): Add
	reference to regenerate-opt-urls.py's PER_LANGUAGE_OPTION_INDEXES
	and Makefile.in's OPT_URLS_HTML_DEPS.
	(Anatomy of a Target Back End): Add
	reference to regenerate-opt-urls.py's TARGET_SPECIFIC_PAGES.
	* regenerate-opt-urls.py: New file.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

As another followup to r14-6057-g12b67d1e13b3cf, optionally add SARIF
property bags to threadFlowLocation objects when writing out diagnostic
paths, and add analyzer-specific properties to them.

This was useful for debugging PR analyzer/112790.

gcc/analyzer/ChangeLog:
	* checker-event.cc: Include "diagnostic-format-sarif.h" and
	"tree-logical-location.h".
	(checker_event::maybe_add_sarif_properties): New.
	(superedge_event::maybe_add_sarif_properties): New.
	(superedge_event::superedge_event): Add comment.
	* checker-event.h (checker_event::maybe_add_sarif_properties): New
	decl.
	(superedge_event::maybe_add_sarif_properties): New decl.

gcc/ChangeLog:
	* diagnostic-format-sarif.cc
	(sarif_builder::make_logical_location_object): Convert to...
	(make_sarif_logical_location_object): ...this.
	(sarif_builder::set_any_logical_locs_arr): Update for above
	change.
	(sarif_builder::make_thread_flow_location_object): Call
	maybe_add_sarif_properties on each diagnostic_event.
	* diagnostic-format-sarif.h (class logical_location): New forward
	decl.
	(make_sarif_logical_location_object): New decl.
	* diagnostic-path.h (class sarif_object): New forward decl.
	(diagnostic_event::maybe_add_sarif_properties): New vfunc.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

gcc/analyzer/ChangeLog:
	PR analyzer/112790
	* checker-event.cc (class inlining_info): Move to...
	* inlining-iterator.h (class inlining_info): ...here.
	* sm-malloc.cc: Include "analyzer/inlining-iterator.h".
	(maybe_complain_about_deref_before_check): Reject stmts that were
	inlined from another function.

gcc/testsuite/ChangeLog:
	PR analyzer/112790
	* c-c++-common/analyzer/deref-before-check-pr112790.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

gcc/analyzer/ChangeLog:
	PR analyzer/113222
	* access-diagram.cc (valid_region_spatial_item::add_boundaries):
	Handle TYPE_DOMAIN being null.
	(valid_region_spatial_item::add_array_elements_to_table):
	Likewise.

gcc/testsuite/ChangeLog:
	PR analyzer/113222
	* gcc.dg/analyzer/out-of-bounds-diagram-pr113222.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

According to spec, fmv.h checks if the input operands are correctly
NaN-boxed. If not, the input value is treated as an n-bit canonical NaN.
This patch fixs the issue that operands returned by soft-fp16 libgcc
(i.e., __truncdfhf2) was not correctly NaN-boxed.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_legitimize_move): Expand movfh
	with Nan-boxing value.
	* config/riscv/riscv.md (*movhf_softfloat_unspec): New pattern.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/_Float16-nanboxing.c: New test.

Co-authored-by: Patrick Lin <patrick@andestech.com>
Co-authored-by: Rufus Chen <rufus@andestech.com>
Co-authored-by: Monk Chiang <monk.chiang@sifive.com>

This patch fixes PR rtl-optmization/104914 by tweaking/improving the way
the fields are written into a pseudo register that needs to be kept sign
extended.

The motivating example from the bugzilla PR is:

extern void ext(int);
void foo(const unsigned char *buf) {
  int val;
  ((unsigned char*)&val)[0] = *buf++;
  ((unsigned char*)&val)[1] = *buf++;
  ((unsigned char*)&val)[2] = *buf++;
  ((unsigned char*)&val)[3] = *buf++;
  if(val > 0)
    ext(1);
  else
    ext(0);
}

which at the end of the tree optimization passes looks like:

void foo (const unsigned char * buf)
{
  int val;
  unsigned char _1;
  unsigned char _2;
  unsigned char _3;
  unsigned char _4;
  int val.5_5;

  <bb 2> [local count: 1073741824]:
  _1 = *buf_7(D);
  MEM[(unsigned char *)&val] = _1;
  _2 = MEM[(const unsigned char *)buf_7(D) + 1B];
  MEM[(unsigned char *)&val + 1B] = _2;
  _3 = MEM[(const unsigned char *)buf_7(D) + 2B];
  MEM[(unsigned char *)&val + 2B] = _3;
  _4 = MEM[(const unsigned char *)buf_7(D) + 3B];
  MEM[(unsigned char *)&val + 3B] = _4;
  val.5_5 = val;
  if (val.5_5 > 0)
    goto <bb 3>; [59.00%]
  else
    goto <bb 4>; [41.00%]

  <bb 3> [local count: 633507681]:
  ext (1);
  goto <bb 5>; [100.00%]

  <bb 4> [local count: 440234144]:
  ext (0);

  <bb 5> [local count: 1073741824]:
  val ={v} {CLOBBER(eol)};
  return;

}

Here four bytes are being sequentially written into the SImode value
val.  On some platforms, such as MIPS64, this SImode value is kept in
a 64-bit register, suitably sign-extended.  The function expand_assignment
contains logic to handle this via SUBREG_PROMOTED_VAR_P (around line 6264
in expr.cc) which outputs an explicit extension operation after each
store_field (typically insv) to such promoted/extended pseudos.

The first observation is that there's no need to perform sign extension
after each byte in the example above; the extension is only required
after changes to the most significant byte (i.e. to a field that overlaps
the most significant bit).

The bug fix is actually a bit more subtle, but at this point during
code expansion it's not safe to use a SUBREG when sign-extending this
field.  Currently, GCC generates (sign_extend:DI (subreg:SI (reg:DI) 0))
but combine (and other RTL optimizers) later realize that because SImode
values are always sign-extended in their 64-bit hard registers that
this is a no-op and eliminates it.  The trouble is that it's unsafe to
refer to the SImode lowpart of a 64-bit register using SUBREG at those
critical points when temporarily the value isn't correctly sign-extended,
and the usual backend invariants don't hold.  At these critical points,
the middle-end needs to use an explicit TRUNCATE rtx (as this isn't a
TRULY_NOOP_TRUNCATION), so that the explicit sign-extension looks like
(sign_extend:DI (truncate:SI (reg:DI)), which avoids the problem.

2024-01-04  Roger Sayle  <roger@nextmovesoftware.com>
	    Jeff Law  <jlaw@ventanamicro.com>

gcc/ChangeLog
	PR rtl-optimization/104914
	* expr.cc (expand_assignment): When target is SUBREG_PROMOTED_VAR_P
	a sign or zero extension is only required if the modified field
	overlaps the SUBREG's most significant bit.  On MODE_REP_EXTENDED
	targets, don't refer to the temporarily incorrectly extended value
	using a SUBREG, but instead generate an explicit TRUNCATE rtx.

This reverts commit b1342247.

Consider this following case:

void
f (int *restrict a, int *restrict b, int *restrict c, int *restrict d, int n)
{
  for (int i = 0; i < n; i++)
    {
      int tmp = b[i] + 15;
      int tmp2 = tmp + b[i];
      c[i] = tmp2 + b[i];
      d[i] = tmp + tmp2 + b[i];
    }
}

Current dynamic LMUL cost model choose LMUL = 4 because we count the "15" as
consuming 1 vector register group which is not accurate.

We teach the dynamic LMUL cost model be aware of the potential vi variant instructions
transformation, so that we can choose LMUL = 8 according to more accurate cost model.

After this patch:

f:
	ble	a4,zero,.L5
.L3:
	vsetvli	a5,a4,e32,m8,ta,ma
	slli	a0,a5,2
	vle32.v	v16,0(a1)
	vadd.vi	v24,v16,15
	vadd.vv	v8,v24,v16
	vadd.vv	v0,v8,v16
	vse32.v	v0,0(a2)
	vadd.vv	v8,v8,v24
	vadd.vv	v8,v8,v16
	vse32.v	v8,0(a3)
	add	a1,a1,a0
	add	a2,a2,a0
	add	a3,a3,a0
	sub	a4,a4,a5
	bne	a4,zero,.L3
.L5:
	ret

Tested on both RV32 and RV64 no regression. Ok for trunk ?

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-13.c: New test.

`interrupt` function will backup fcsr register, but it fixed to SImode,
it's not big issue since fcsr only used 8 bits so far, however the
offset should still using UNITS_PER_WORD to prevent the stack offset
become non 8 byte aligned, it will cause problem for RV64.

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_for_each_saved_reg): Adjust the
	offset of fcsr.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/interrupt-misaligned.c: New.

In the LoongArch architecture, GCC supports the vectorization function tested
by vect/slp-26.c, but there is no detection of loongarch in dg-finals.  Add
loongarch to the appropriate dg-finals.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/slp-26.c: Add loongarch.

Notice a case has "Maximum lmul = 16" which is incorrect.
Correct LMUL estimation for MASK_LEN_LOAD/MASK_LEN_STORE.

Committed.

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): New function.
	(compute_nregs_for_mode): Refine LMUL.
	(max_number_of_live_regs): Ditto.
	(compute_estimated_lmul): Ditto.
	(has_unexpected_spills_p): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-11.c: New test.

After implementing the cost model on the LoongArch architecture, the GCC
compiler code has this feature turned on by default, which causes the
lasx-xvstelm.c file test to fail. Through analysis, this test case can
generate vectorization instructions required for detection only after
disabling the functionality of the cost model with the "-fno-vect-cost-model"
compilation option.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vector/lasx/lasx-xvstelm.c:Add compile
	option "-fno-vect-cost-model" to dg-options.

There are currently two versions of the implementations of constant
vector permutation: loongarch_expand_vec_perm_const_1 and
loongarch_expand_vec_perm_const_2.  The implementations of the two
versions are different. Currently, only the implementation of
loongarch_expand_vec_perm_const_1 is used for 256-bit vectors.  We
hope to streamline the code as much as possible while retaining the
better-performing implementation of the two.  By repeatedly testing
spec2006 and spec2017, we got the following Merged version.
Compared with the pre-merger version, the number of lines of code
in loongarch.cc has been reduced by 888 lines.  At the same time,
the performance of SPECint2006 under Ofast has been improved by 0.97%,
and the performance of SPEC2017 fprate has been improved by 0.27%.

gcc/ChangeLog:

	* config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
	Remove useless forward declaration.
	(loongarch_is_even_extraction): Remove useless forward declaration.
	(loongarch_try_expand_lsx_vshuf_const): Removed.
	(loongarch_expand_vec_perm_const_1): Merged.
	(loongarch_is_double_duplicate): Removed.
	(loongarch_is_center_extraction): Ditto.
	(loongarch_is_reversing_permutation): Ditto.
	(loongarch_is_di_misalign_extract): Ditto.
	(loongarch_is_si_misalign_extract): Ditto.
	(loongarch_is_lasx_lowpart_extract): Ditto.
	(loongarch_is_op_reverse_perm): Ditto.
	(loongarch_is_single_op_perm): Ditto.
	(loongarch_is_divisible_perm): Ditto.
	(loongarch_is_triple_stride_extract): Ditto.
	(loongarch_expand_vec_perm_const_2): Merged.
	(loongarch_expand_vec_perm_const): New.
	(loongarch_vectorize_vec_perm_const): Adjust.

gcc/ChangeLog
	* omp-general.cc: Fix comment typos and misplaced/confusing
	comments.  Delete redundant include of omp-general.h.

gcc/testsuite

	* gcc.c-torture/compile/mipscop-1.c: Include stdio.h.
	* gcc.c-torture/compile/mipscop-2.c: Ditto.
	* gcc.c-torture/compile/mipscop-3.c: Ditto.
	* gcc.c-torture/compile/mipscop-4.c: Ditto.

This match pattern allows combination (zero_extract:DI 8, 24, QI)
with an sign-extend to 32bit INS instruction on TARGET_64BIT.

For SI mode, if the sign-bit is modified by bitops, we will need a
sign-extend operation.  Since 32bit INS instruction can be sure that
result is sign-extended, and the QImode src register is safe for INS, too.

(insn 19 18 20 2 (set (zero_extract:DI (reg/v:DI 200 [ val ])
            (const_int 8 [0x8])
            (const_int 24 [0x18]))
        (subreg:DI (reg:QI 205) 0)) "../xx.c":7:29 -1
     (nil))
(insn 20 19 23 2 (set (reg/v:DI 200 [ val ])
        (sign_extend:DI (subreg:SI (reg/v:DI 200 [ val ]) 0))) "../xx.c":7:29 -1
     (nil))

Combine try to merge them to:

(insn 20 19 23 2 (set (reg/v:DI 200 [ val ])
        (sign_extend:DI (ior:SI (and:SI (subreg:SI (reg/v:DI 200 [ val ]) 0)
                    (const_int 16777215 [0xffffff]))
                (ashift:SI (subreg:SI (reg:QI 205 [ MEM[(const unsigned char *)buf_8(D) + 3B] ]) 0)
                    (const_int 24 [0x18]))))) "../xx.c":7:29 18 {*insv_extended}
     (expr_list:REG_DEAD (reg:QI 205 [ MEM[(const unsigned char *)buf_8(D) + 3B] ])
        (nil)))

And do similarly for 16/16 pair:
(insn 13 12 14 2 (set (zero_extract:DI (reg/v:DI 198 [ val ])
            (const_int 16 [0x10])
            (const_int 16 [0x10]))
        (subreg:DI (reg:HI 201 [ MEM[(const short unsigned int *)buf_6(D) + 2B] ]) 0)) "xx.c":5:30 286 {*insvdi}
     (expr_list:REG_DEAD (reg:HI 201 [ MEM[(const short unsigned int *)buf_6(D) + 2B] ])
        (nil)))
(insn 14 13 17 2 (set (reg/v:DI 198 [ val ])
        (sign_extend:DI (subreg:SI (reg/v:DI 198 [ val ]) 0))) "xx.c":5:30 241 {extendsidi2}
     (nil))
------------>
(insn 14 13 17 2 (set (reg/v:DI 198 [ val ])
        (sign_extend:DI (ior:SI (ashift:SI (subreg:SI (reg:HI 201 [ MEM[(const short unsigned int *)buf_6(D) + 2B] ]) 0)
                    (const_int 16 [0x10]))
                (zero_extend:SI (subreg:HI (reg/v:DI 198 [ val ]) 0))))) "xx.c":5:30 284 {*inshisi_extended}
     (expr_list:REG_DEAD (reg:HI 201 [ MEM[(const short unsigned int *)buf_6(D) + 2B] ])
        (nil)))

Let's accept these patterns, and set the cost to 1 instruction.

gcc

	PR rtl-optimization/104914
	* config/mips/mips.md (insqisi_extended): New patterns.
	(inshisi_extended): Ditto.

gcc/testsuite

	* gcc.target/mips/pr104914.c: New test.

When combine some instructions, the generic `rtx_cost`
may over estimate the cost of result RTL, due to that
the RTL may be quite complex and `rtx_cost` has no
information that this RTL can be convert to simple
hardware instruction(s).

In this case, Let's use `insn_count * perf_ratio` to
estimate the cost if both of them are available.
Otherwise fallback to pattern_cost.

When non-speed, Let's use the length as cost.

gcc

	* config/mips/mips.cc (mips_insn_cost): New function.

gcc/testsuite

	* gcc.target/mips/data-sym-multi-pool.c: Skip Os or -O0.