Confusion in binding_cluster::maybe_get_compound_binding about whether
offsets are relative to the start of the region or to the start of the
cluster was leading to incorrect handling of default values, leading
to false positives from -Wanalyzer-use-of-uninitialized-value, from
-Wanalyzer-exposure-through-uninit-copy, and other logic errors.

Fixed thusly.

gcc/analyzer/ChangeLog:
	PR analyzer/112969
	* store.cc (binding_cluster::maybe_get_compound_binding): When
	populating default_map, express the bit-range of the default key
	for REG relative to REG, rather than to the base region.

gcc/testsuite/ChangeLog:
	PR analyzer/112969
	* c-c++-common/analyzer/compound-assignment-5.c (test_3): Remove
	xfails, reorder tests.
	* c-c++-common/analyzer/compound-assignment-pr112969.c: New test.
	* gcc.dg/plugin/infoleak-pr112969.c: New test.
	* gcc.dg/plugin/plugin.exp: Add infoleak-pr112969.c to
	analyzer_kernel_plugin.c tests.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

This patch corrects the definition of lseek by changing the second
parameter to a CSSIZE_T rather than LONGINT and allow the return value
to be ignored.

gcc/m2/ChangeLog:

	* gm2-libs/libc.def (lseek): Change the second parameter
	type to	CSSIZE_T and make the return value optional.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

Spec: github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md

Contributors:
  Mary Bennett <mary.bennett@embecosm.com>
  Nandni Jamnadas <nandni.jamnadas@embecosm.com>
  Pietra Ferreira <pietra.ferreira@embecosm.com>
  Charlie Keaney
  Jessica Mills
  Craig Blackmore <craig.blackmore@embecosm.com>
  Simon Cook <simon.cook@embecosm.com>
  Jeremy Bennett <jeremy.bennett@embecosm.com>
  Helene Chelin <helene.chelin@embecosm.com>

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc: Add XCVbitmanip.
	* config/riscv/constraints.md: Likewise.
	* config/riscv/corev.def: Likewise.
	* config/riscv/corev.md: Likewise.
	* config/riscv/predicates.md: Likewise.
	* config/riscv/riscv-builtins.cc (AVAIL): Likewise.
	* config/riscv/riscv-ftypes.def: Likewise.
	* config/riscv/riscv.opt: Likewise.
	* config/riscv/riscv.cc (riscv_print_operand): Add new operand 'Y'.
	* doc/extend.texi: Add XCVbitmanip builtin documentation.
	* doc/sourcebuild.texi: Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/cv-simd-abs-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-abs-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-add-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-and-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avg-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-avgu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpeq-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpge-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgeu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgt-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpgtu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmple-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpleu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmplt-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpltu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cmpne-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxconj-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-i-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-cplxmul-r-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotsp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotup-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-dotusp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extract-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extract-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extractu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-extractu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-insert-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-insert-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-march-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-max-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-maxu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-min-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-minu-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-neg-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-neg-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-or-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-pack-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-pack-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-packhi-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-packlo-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotsp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotup-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sdotusp-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shuffle-sci-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shuffle2-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shuffle2-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei0-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei1-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei2-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-shufflei3-sci-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sll-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sra-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-srl-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-sub-sc-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-div2-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-div4-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-subrotmj-div8-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-h-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-sc-b-compile-1.c: New test.
	* gcc.target/riscv/cv-simd-xor-sc-h-compile-1.c: New test.
	* lib/target-supports.exp: Add proc for XCVsimd extension.

gcc/
	* config/gcn/gcn-hsa.h (ASM_SPEC): Add space after -mxnack= argument.

Also adjust some of the tests for scan-assembly. The behavior is the
same as --param=riscv-vector-abi before.

gcc/ChangeLog:

	PR target/113538
	* config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag.
	(riscv_fntype_abi): Ditto.
	* config/riscv/riscv.opt: Ditto.

gcc/testsuite/ChangeLog:

	PR target/113538
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c: Fix the asm
	check.
	* gcc.target/riscv/rvv/base/abi-call-args-1-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-2-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-3-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-3.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-4-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-4.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-error-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-return-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-return.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-variant_cc.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-69.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-70.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-71.c: Ditto.
	* gcc.target/riscv/rvv/base/misc_vreinterpret_vbool_vint.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vfadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vget_vset.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vloxseg2ei16.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vreinterpret.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vfadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vget_vset.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vloxseg2ei16.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vreinterpret.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-10.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-11.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-9.c: Ditto.
	* gcc.target/riscv/rvv/base/tuple_vundefined.c: Ditto.
	* gcc.target/riscv/rvv/base/vcreate.c: Ditto.
	* gcc.target/riscv/rvv/base/vlmul_ext-1.c: Ditto.
	* gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c: Ditto.
	* gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c: Ditto.
	* lib/target-supports.exp: Remove the flag.

Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com>

The following patch is miscompiled, because convert_to_integer_1 for
LSHIFT_EXPR tests if the INTEGER_CST shift count is too high, but
incorrectly compares it against TYPE_SIZE rather than TYPE_PRECISION.
The type in question is unsigned _BitInt(1), which has TYPE_PRECISION 1,
TYPE_SIZE 8, and the shift count is 2 in that case.

2024-01-25  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113574
	* convert.cc (convert_to_integer_1) <case LSHIFT_EXPR>: Compare shift
	count against TYPE_PRECISION rather than TYPE_SIZE.

	* gcc.dg/torture/bitint-52.c: New test.

When generalising vector_cst_all_same, I'd forgotten to update
VECTOR_CST_ENCODED_ELT to VECTOR_CST_ELT.  The check deliberately
looks at implicitly encoded elements in some cases.

gcc/
	PR target/113572
	* config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same):
	Check VECTOR_CST_ELT instead of VECTOR_CST_ENCODED_ELT

gcc/testsuite/
	PR target/113572
	* gcc.target/aarch64/sve/pr113572.c: New test.

The LS64 movv8di pattern didn't handle loads that overlapped with
the address register (unless the overlap happened to be in the
last subload).

gcc/
	PR target/113550
	* config/aarch64/aarch64-simd.md: In the movv8di splitter, check
	whether each split instruction is a load that clobbers the source
	address.  Emit that instruction last if so.

gcc/testsuite/
	PR target/113550
	* gcc.target/aarch64/pr113550.c: New test.

g:74e3e839 handled the UXTL{,2}-ZIP[12] optimisation
in split1.  The UXTL input is a 64-bit vector of N-bit elements
and the result is a 128-bit vector of 2N-bit elements.  The
corresponding ZIP1 operates on 128-bit vectors of N-bit elements.

This meant that the ZIP1 input had to be a 128-bit paradoxical subreg
of the 64-bit UXTL input.  In the PRs, it wasn't possible to generate
this subreg because the inputs were already subregs of a x[234]
structure of 64-bit vectors.

I don't think the same thing can happen for UXTL2->ZIP2 because
UXTL2 input is a 128-bit vector rather than a 64-bit vector.

It isn't really necessary for ZIP1 to take 128-bit inputs,
since the upper 64 bits are ignored.  This patch therefore adds
a pattern for 64-bit → 128-bit ZIP1s.

In principle, we should probably use this form for all ZIP1s.
But in practice, that creates an awkward special case, and
would be quite invasive for stage 4.

gcc/
	PR target/113485
	* config/aarch64/aarch64-simd.md (aarch64_zip1<mode>_low): New
	pattern.
	(<optab><Vnarrowq><mode>2): Use it instead of generating a
	paradoxical subreg for the input.

gcc/testsuite/
	PR target/113485
	* gcc.target/aarch64/pr113485.c: New test.
	* gcc.target/aarch64/pr113573.c: Likewise.

While looking into PR113469, I notice the LCM delete a vsetvl incorrectly.

This patch add dump information of all predecessors for LCM delete vsetvl block
for better debugging.

Tested no regression.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (get_all_predecessors): New function.
	(pre_vsetvl::pre_global_vsetvl_info): Add LCM delete block all
	predecessors dump information.

Notice full available is computed evey round of earliest fusion which is redundant.
Actually we only need to compute it once in phase 3.

It's NFC patch and tested no regression. Committed.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_vsetvl_def_data): Remove
	redundant full available computation.
	(pre_vsetvl::pre_global_vsetvl_info): Ditto.

This fixes of the vect testcases which uses the gimple FE for LLP64 targets.
The testcases use directly `unsigned long` for the addition to pointers
when they should be using `__SIZETYPE__`. This changes to use that instead.

gcc/testsuite/ChangeLog:

	PR testsuite/113548
	* gcc.dg/vect/slp-reduc-10a.c: Use `__SIZETYPE__` instead of `unsigned long`.
	* gcc.dg/vect/slp-reduc-10b.c: Likewise.
	* gcc.dg/vect/slp-reduc-10c.c: Likewise.
	* gcc.dg/vect/slp-reduc-10d.c: Likewise.
	* gcc.dg/vect/slp-reduc-10e.c: Likewise.
	* gcc.dg/vect/vect-cond-arith-2.c: Likewise.
	* gcc.dg/vect/vect-ifcvt-19.c: Likewise.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

When looking into PR113572, I've noticed a typo in VECTOR_CST documentation
and grep found pasto of it elsewhere.

2024-01-25  Jakub Jelinek  <jakub@redhat.com>

	* doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns.
	* doc/rtl.texi (CONST_VECTOR): Likewise.

This patch adds no fusion compile option to disable phase 2 global fusion.

It can help us to analyze the compile-time and debugging.

Committed.

gcc/ChangeLog:

	* config/riscv/riscv-opts.h (enum vsetvl_strategy_enum): Add optim-no-fusion option.
	* config/riscv/riscv-vsetvl.cc (pass_vsetvl::lazy_vsetvl): Ditto.
	(pass_vsetvl::execute): Ditto.
	* config/riscv/riscv.opt: Ditto.

It is incorrect to use vld/vori to implement the vec_concatz<mode> because when the LSX
instruction is used to update the value of the vector register, the upper 128 bits of
the vector register will not be zeroed.

gcc/ChangeLog:

	* config/loongarch/lasx.md (@vec_concatz<mode>): Remove this define_insn pattern.
	* config/loongarch/loongarch.cc (loongarch_expand_vector_group_init): Use vec_concat<mode>.

We can't support niters with may_be_zero when we end up with a
non-empty latch due to early exit peeling.  At least not in
the simplistic way the vectorizer handles this now.  Disallow
it again for exits that are not the last one.

	PR tree-optimization/113576
	* tree-vect-loop.cc (vec_init_loop_exit_info): Only allow
	exits with may_be_zero niters when its the last one.

	* gcc.dg/vect/pr113576.c: New testcase.

TLS gd ld and ie type symbols will generate corresponding GOT entries,
so non-zero offsets cannot be generated.
The address of TLS le type symbol+addend is not implemented in binutils,
so non-zero offset is not generated here for the time being.

gcc/ChangeLog:

	* config/loongarch/loongarch.cc (loongarch_symbolic_constant_p):
	For symbols of type tls, non-zero Offset is not generated.

gcc/
	* config/rs6000/rs6000-string.cc (expand_block_compare): Enable
	P9 with m32 and mpowerpc64.

gcc/testsuite/
	* gcc.target/powerpc/block-cmp-1.c: Exclude m32 and mpowerpc64.
	* gcc.target/powerpc/block-cmp-4.c: Likewise.
	* gcc.target/powerpc/block-cmp-8.c: New.

gcc/ChangeLog:

	* config/i386/i386-options.cc (ix86_option_override_internal):
	Enable -mlam=u57 by default when compiled with
	-fsanitize=hwaddress.

There're 2 cases:
1. hwasan-poison-optimisation.c is supposed to scan call to
__hwasan_tag_mismatch4, and x86 have different mnemonic(call) from
aarch64(bl), so adjust testcase to scan either call or bl.

2. alloca-outside-caught.c/vararray-outside-caught.c are supposed to
scan mismatched tags and expected the tag corresponding to
out-of-bounds memory is 00, but for x86 the continous stack is
allocated by other local variable/array which is assigned with a
different tag, but still there're mismatches. So adjust testcase to
scan XX/XX instead of XX/00.

gcc/testsuite/ChangeLog:

	* c-c++-common/hwasan/alloca-outside-caught.c: Adjust
	testcase.
	* c-c++-common/hwasan/hwasan-poison-optimisation.c: Ditto.
	* c-c++-common/hwasan/vararray-outside-caught.c: Ditto.

Currently, when exporting names from the GMF, or within header modules,
for a set of constrained partial specialisations we only emit the first
one. This is because the 'type_specialization' list only includes a
single specialization per template+argument list; constraints are not
considered here.

The existing code uses a separate 'partial_specializations' list to
track this instead, but currently it's only used for declarations in the
module purview. This patch makes use of this list for all declarations.

	PR c++/113405

gcc/cp/ChangeLog:

	* module.cc (set_defining_module): Track partial specialisations
	for all declarations.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/concept-9.h: New test.
	* g++.dg/modules/concept-9_a.C: New test.
	* g++.dg/modules/concept-9_b.C: New test.
	* g++.dg/modules/concept-10_a.H: New test.
	* g++.dg/modules/concept-10_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

Currently, importing a namespace declarations marks it as imported, and
so marks it as originating from the module that it was imported from.
This is usually harmless, but causes problems with nested namespaces.

In the linked PR, what happens is that the namespace 'A' imported from
the module ends up not being considered when creating the 'A' namespace
within its own TU, and thus it has its 'cp_binding_level' recreated.
However, by this point 'A::B' has already been imported, and so the
'level_chain' member no longer correctly points at 'A's binding level,
so the sanity check for this in 'resume_scope' ICEs.

Since as far as I can tell there's no reason for imported namespaces to
be attached to any specific module (namespace declarations with external
linkage are always attached to the global module by [module.unit] p7.2),
this patch just removes the 'imported' flag, which stops code from
caring about its originating module.

This patch also makes some minor adjustments to existing tests to cater
for the new dumped name.

	PR c++/100707

gcc/cp/ChangeLog:

	* name-lookup.cc (add_imported_namespace): Don't mark namespaces
	as imported.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/indirect-1_b.C: Adjust to handle namespaces not
	being attached to the module they were imported from.
	* g++.dg/modules/indirect-1_c.C: Likewise.
	* g++.dg/modules/indirect-2_b.C: Likewise.
	* g++.dg/modules/indirect-2_c.C: Likewise.
	* g++.dg/modules/indirect-3_b.C: Likewise.
	* g++.dg/modules/indirect-3_c.C: Likewise.
	* g++.dg/modules/indirect-4_b.C: Likewise.
	* g++.dg/modules/indirect-4_c.C: Likewise.
	* g++.dg/modules/namespace-5_a.C: New test.
	* g++.dg/modules/namespace-5_b.C: New test.
	* g++.dg/modules/namespace-5_c.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

gcc/testsuite/ChangeLog:

	* gcc.target/i386/adx-check.h: Include stdio.h when DEBUG
	is defined.
	* gcc.target/i386/avx512fp16-vscalefph-1b.c: Do not define
	DEBUG.
	* gcc.target/i386/avx512fp16vl-vaddph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vcmpph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vdivph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vfpclassph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vgetexpph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vgetmantph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vmaxph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vminph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vmulph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vrcpph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vreduceph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vrndscaleph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vrsqrtph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vscalefph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vsqrtph-1b.c: Ditto.
	* gcc.target/i386/avx512fp16vl-vsubph-1b.c: Ditto.
	* gcc.target/i386/readeflags-1.c: Include stdio.h when DEBUG
	is defined.
	* gcc.target/i386/rtm-check.h: Ditto.
	* gcc.target/i386/sha-check.h: Ditto.
	* gcc.target/i386/writeeflags-1.c: Ditto.

My last commit I tested on aarch64 but vect_long_mult was not actually invoked
and I didn't notice that I was missing a `[` in front of check_effective_target_aarch64_sve.
When I ran the testsuite on x86_64, I got the failure.

Committed as obvious after testing on x86_64.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp (check_effective_target_vect_long_mult): Fix
	small typo for aarch64*-*-*.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

I can't actually find anything in the ISA manual that makes Ztso imply
A.  In theory the memory ordering is just a different thing that the set
of availiable instructions (ie, Ztso without A would still imply TSO for
loads and stores).  It also seems like a configuration that could be
sane to build: without A it's all but impossible to write any meaningful
multi-core code, and TSO is really cheap for a single core.

That said, I think it's kind of reasonable to provide A to users asking
for Ztso.  So maybe even if this was a mistake it's the right thing to
do?

gcc/ChangeLog:

	* common/config/riscv/riscv-common.cc (riscv_implied_info):
	Remove {"ztso", "a"}.

Here we handle the operator expression u < v inconsistently: in a SFINAE
context we accept it, and in a non-SFINAE context we reject it with

  error: request for member 'operator<=>' is ambiguous

as per [class.member.lookup]/6.  This inconsistency is ultimately
because we neglect to propagate error_mark_node after recursing in
add_operator_candidates, fixed like so.

	PR c++/113529

gcc/cp/ChangeLog:

	* call.cc (add_operator_candidates): Propagate error_mark_node
	result after recursing to find rewritten candidates.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/spaceship-sfinae3.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>

The patch for this PR is unneeded on trunk, but let's add the test.

	PR c++/113347

gcc/testsuite/ChangeLog:

	* g++.dg/eh/return3.C: New test.

gcc/fortran/ChangeLog:

	PR fortran/113377
	* trans-expr.cc (conv_dummy_value): New.
	(gfc_conv_procedure_call): Factor code for handling dummy arguments
	with the VALUE attribute in the scalar case into conv_dummy_value().
	Reuse and adjust for calling elemental procedures.

gcc/testsuite/ChangeLog:

	PR fortran/113377
	* gfortran.dg/optional_absent_10.f90: New test.

On aarch64, vectorization of `long` multiply can be done if SVE is enabled
or if long is 32bit (ILP32). It can also be done for constants too but there
is no effective target test for that just yet.

Build and tested on aarch64-linux-gnu with no regressions (also tested with SVE enabled).

gcc/testsuite/ChangeLog:

	PR testsuite/109705
	* lib/target-supports.exp (check_effective_target_vect_long_mult):
	Fix aarch64*-*-* checks.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

PR 108007 is another manifestation where we rely on DCE to clean-up
after IPA-SRA and if the user explicitely switches DCE off, IPA-SRA
can leave behind statements which are fed uninitialized values and
trap, even though their results are themselves never used.

I have already fixed this for unused parameters in callees, this bug
shows that almost the same thing can happen for removed returns, on
the side of callers.  This means that the issue has to be fixed
elsewhere, in call redirection.  This patch adds a function which
looks for (and through, using a work-list) uses of operations fed
specific SSA names and removes them all.

That would have been easy if it wasn't for debug statements during
tree-inline (from which call redirection is also invoked).  Debug
statements are decoupled from the rest at this point and iterating
over uses of SSAs does not bring them up.  During tree-inline they are
handled especially at the end, I assume in order to make sure that
relative ordering of UIDs are the same with and without debug info.

This means that during tree-inline we need to make a hash of killed
SSAs, that we already have in copy_body_data, available to the
function making the purging.  So the patch duly does also that, making
the interface slightly ugly.  Moreover, all newly unused SSA names
need to be freed and as PR 112616 showed, it must be done in a defined
order, which is what newly added ipa_release_ssas_in_hash does.

gcc/ChangeLog:

2024-01-12  Martin Jambor  <mjambor@suse.cz>

	PR ipa/108007
	PR ipa/112616
	* cgraph.h (cgraph_edge): Add a parameter to
	redirect_call_stmt_to_callee.
	* ipa-param-manipulation.h (ipa_param_adjustments): Add a
	parameter to modify_call.
	(ipa_release_ssas_in_hash): Declare.
	* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
	parameter killed_ssas, pass it to padjs->modify_call.
	* ipa-param-manipulation.cc (purge_all_uses): New function.
	(ipa_param_adjustments::modify_call): New parameter killed_ssas.
	Instead of substituting uses, invoke purge_all_uses.  If
	hash of killed SSAs has not been provided, create a temporary one
	and release SSAs that have been added to it.
	(compare_ssa_versions): New function.
	(ipa_release_ssas_in_hash): Likewise.
	* tree-inline.cc (redirect_all_calls): Create
	id->killed_new_ssa_names earlier, pass it to edge redirection,
	adjust a comment.
	(copy_body): Release SSAs in id->killed_new_ssa_names.

gcc/testsuite/ChangeLog:

2024-01-15  Martin Jambor  <mjambor@suse.cz>

	PR ipa/108007
	PR ipa/112616
	* gcc.dg/ipa/pr108007.c: New test.
	* gcc.dg/ipa/pr112616.c: Likewise.

The problem here is the builtin apply mechanism thinks the FP registers
are to be used due to get_raw_arg_mode not returning VOIDmode. This
fixes that oversight and the backend now returns VOIDmode for non-general-regs
if TARGET_GENERAL_REGS_ONLY is true.

Built and tested for aarch64-linux-gnu with no regressions.

	PR target/113486

gcc/ChangeLog:

	* config/aarch64/aarch64.cc (aarch64_get_reg_raw_mode): For
	TARGET_GENERAL_REGS_ONLY, return VOIDmode for non-GP_REGNUM_P regno.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/builtin_apply-1.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

Since the match.pd transforms (zero_one == 0) ? y : z <op> y,
into ((typeof(y))zero_one * z) <op> y. Add splitters to recongize
this expression to generate SFB instructions.

gcc/ChangeLog:
	PR target/113095
	* config/riscv/sfb.md: New splitters to rewrite single bit
	sign extension as the condition to SFB instructions.

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/sfb.c: New test.
	* gcc.target/riscv/pr113095.c: New test.

-falign-functions is ignored in cold code, since it is an optimization intended to
improve instruction prefetch.  In some case it is necessary to force alignment for
all functions, so this patch adds -fmin-function-alignment for this purpose.

gcc/ChangeLog:

	PR middle-end/88345
	* common.opt: (flimit-function-alignment): Reorder alphabeticaly
	(fmin-function-alignment): New parameter.
	* doc/invoke.texi: (-fmin-function-alignment): Document.
	(-falign-functions,-falign-loops,-falign-labels): Mention that
	aglinments are ignored in cold code.
	* varasm.cc (assemble_start_function): Handle min-function-alignment.

As suggested in the ticket this replaces the expansion by converting the
Advanced SIMD types to SVE types by simply printing out an SVE register for
these instructions.

This fixes the subreg issues since there are no subregs involved anymore.

gcc/ChangeLog:

	PR target/109636
	* config/aarch64/aarch64-simd.md (<su_optab>div<mode>3,
	mulv2di3): Remove.
	* config/aarch64/iterators.md (VQDIV): Remove.
	(SVE_FULL_SDI_SIMD, SVE_FULL_HSDI_SIMD_DI,
	SVE_I_SIMD_DI): New.
	(VPRED, sve_lane_con): Add V4SI and V2DI.
	* config/aarch64/aarch64-sve.md (<optab><mode>3,
	@aarch64_pred_<optab><mode>): Support Advanced SIMD types.
	(mul<mode>3): New, split from <optab><mode>3.
	(@aarch64_pred_<optab><mode>, *post_ra_<optab><mode>3): New.
	* config/aarch64/aarch64-sve2.md (@aarch64_mul_lane_<mode>,
	*aarch64_mul_unpredicated_<mode>): Change SVE_FULL_HSDI to
	SVE_FULL_HSDI_SIMD_DI.

gcc/testsuite/ChangeLog:

	PR target/109636
	* gcc.target/aarch64/sve/pr109636_1.c: New test.
	* gcc.target/aarch64/sve/pr109636_2.c: New test.
	* gcc.target/aarch64/sve2/pr109636_1.c: New test.

The AArch64 vector PCS does not allow simd calls with simdlen 1,
however due to a bug we currently do allow it for num == 0.

This causes us to emit a symbol that doesn't exist and we fail to link.

gcc/ChangeLog:

	PR tree-optimization/113552
	* config/aarch64/aarch64.cc
	(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.

gcc/testsuite/ChangeLog:

	PR tree-optimization/113552
	* gcc.target/aarch64/pr113552.c: New test.
	* gcc.target/aarch64/simd_pcs_attribute-3.c: Remove bogus check.

When the check for exceeding param_ipa_cp_value_list_size limit was
modified to be ignored for generating values from self-recursive
calls, it should have been changed from equal to, to equals to or is
greater than.  This omission manifests itself as PR 113490.

When I examined the condition I also noticed that the parameter should
come from the callee rather than the caller, since the value list is
associated with the former and not the latter.  In practice the limit
is of course very likely to be the same, but I fixed this aspect of
the condition too.  I briefly audited all other uses of opt_for_fn in
ipa-cp.cc and all the others looked OK.

gcc/ChangeLog:

2024-01-19  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113490
	* ipa-cp.cc (ipcp_lattice<valtype>::add_value): Bail out if value
	count is equal or greater than the limit.  Use the limit from the
	callee.

gcc/testsuite/ChangeLog:

2024-01-22  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113490
	* gcc.dg/ipa/pr113490.c: New test.

gcc/analyzer/ChangeLog:
	PR analyzer/112977
	* engine.cc (impl_region_model_context::on_liveness_change): Pass
	m_ext_state to sm_state_map::on_liveness_change.
	* program-state.cc (sm_state_map::on_svalue_leak): Guard removal
	of map entry based on can_purge_p.
	(sm_state_map::on_liveness_change): Add ext_state param.  Add
	workaround for bad interaction between state purging and
	alt-inherited sm-state.
	* program-state.h (sm_state_map::on_liveness_change): Add
	ext_state param.
	* sm-taint.cc
	(taint_state_machine::has_alt_get_inherited_state_p): New.
	(taint_state_machine::can_purge_p): Return false for "has_lb" and
	"has_ub".
	* sm.h (state_machine::has_alt_get_inherited_state_p): New vfunc.

gcc/testsuite/ChangeLog:
	PR analyzer/112977
	* gcc.dg/plugin/plugin.exp: Add taint-pr112977.c.
	* gcc.dg/plugin/taint-pr112977.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

PR analyzer/112927 reports a false positive from -Wanalyzer-tainted-size
seen on the Linux kernel's drivers/char/ipmi/ipmi_devintf.c with the
analyzer kernel plugin.

The issue is that in:

(A):
  if (msg->data_len > 272) {
    return -90;
  }

(B):
  n = msg->data_len;
  __check_object_size(to, n);
  n = copy_from_user(to, from, n);

the analyzer is treating __check_object_size as having arbitrary side
effects, and, in particular could modify msg->data_len.  Hence the
sanitization that occurs at (A) above is treated as being for a
different value than the size obtained at (B), hence the bogus warning
at the call to copy_from_user.

Fixed by extending the analyzer kernel plugin to "teach" it that
__check_object_size has no side effects.

gcc/testsuite/ChangeLog:
	PR analyzer/112927
	* gcc.dg/plugin/analyzer_kernel_plugin.c
	(class known_function___check_object_size): New.
	(kernel_analyzer_init_cb): Register it.
	* gcc.dg/plugin/plugin.exp: Add taint-pr112927.c.
	* gcc.dg/plugin/taint-pr112927.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

This patch fixes a bug in gcc/m2/gm2-libs/FIO.mod which failed to cast the
whence parameter into the correct type.  The patch casts the whence
parameter for lseek to SYSTEM.CSSIZE_T.

gcc/m2/ChangeLog:

	PR modula2/113559
	* gm2-libs/FIO.mod (SetPositionFromBeginning): Convert pos into
	CSSIZE_T during call to lseek.
	(SetPositionFromEnd): Convert pos into CSSIZE_T during call to
	lseek.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>