- Dec 23, 2024
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rdubner authored
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- Dec 22, 2024
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rdubner authored
Ordinary .cc files have their prerequisite .h files calculated and stored in build/gcc/cobol/.deps as part of the ordinary build. But those three oddball source files only had a few .h files specified, and the ones specified were incomplete. Rather than fuss with it, I just made them dependent on all libgcobol/*.h and gcc/cobol/*.h files.
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rdubner authored
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rdubner authored
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rdubner authored
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rdubner authored
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rdubner authored
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rdubner authored
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- Dec 21, 2024
- Dec 19, 2024
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James K. Lowden authored
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rdubner authored
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rdubner authored
It was interfering with GDB-COBOL's ability to set a breakpoint at the called routine
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James K. Lowden authored
- Dec 18, 2024
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rdubner authored
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rdubner authored
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James K. Lowden authored
- Dec 17, 2024
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James K. Lowden authored
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James K. Lowden authored
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rdubner authored
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James K. Lowden authored
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rdubner authored
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Jonathan Wakely authored
libstdc++-v3/ChangeLog: * include/debug/safe_local_iterator.h (_GLIBCXX_DEBUG_VERIFY_OPERANDS): Add parentheses to avoid -Wparentheses warning.
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Jonathan Wakely authored
Inserting an empty range into a std::deque results in undefined calls to either std::copy, std::copy_backward, std::move, or std::move_backward. We call those algos with invalid arguments where the output range is the same as the input range, e.g. std::copy(first, last, first) which violates the preconditions for the algorithms. This fix simply returns early if there's nothing to insert. Most callers already ensure that we don't even call _M_range_insert_aux with an empty range, but some callers don't. Rather than checking for n == 0 in each of the callers, this just does the check once and uses __builtin_expect to treat empty insertions as unlikely. libstdc++-v3/ChangeLog: PR libstdc++/118035 * include/bits/deque.tcc (_M_range_insert_aux): Return immediately if inserting an empty range. * testsuite/23_containers/deque/modifiers/insert/118035.cc: New test.
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Sandra Loosemore authored
PR c/26154 is one of our oldest documentation issues. The only discussion of OpenMP support in the GCC manual is buried in the "C Dialect Options" section, with nothing at all under "Extensions". The Fortran manual does have separate sections for OpenMP and OpenACC extensions so I have copy-edited/adapted that text for similar sections in the GCC manual, as well as breaking out the OpenMP and OpenACC options into their own section (they apply to all of C, C++, and Fortran). I also updated the information about what versions of OpenMP and OpenACC are supported and removed some redundant text from the Fortran manual to prevent it from getting out of sync on future updates, and inserted some cross-references to the new sections elsewhere. gcc/c-family/ChangeLog PR c/26154 * c.opt.urls: Regenerated. gcc/ChangeLog PR c/26154 * common.opt.urls: Regenerated. * doc/extend.texi (C Extensions): Adjust menu for new sections. (Attribute Syntax): Mention OpenMP directives. (Pragmas): Mention OpenMP and OpenACC directives. (OpenMP): New section. (OpenACC): New section. * doc/invoke.texi (Invoking GCC): Adjust menu for new section. (Option Summary): Move OpenMP and OpenACC options to their own category. (C Dialect Options): Move documentation for -foffload, -fopenacc, -fopenacc-dim, -fopenmp, -fopenmd-simd, and -fopenmp-target-simd-clone to... (OpenMP and OpenACC Options): ...this new section. Light copy-editing of the option descriptions. gcc/fortran/ChangeLog: PR c/26154 * gfortran.texi (Standards): Remove redundant info about OpenMP/OpenACC standard support. (OpenMP): Copy-editing and update version info. (OpenACC): Likewise. * lang.opt.urls: Regenerated.
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Richard Biener authored
The generic expand_vector_piecewise routine supports lowering of a vector operation to vector operations of smaller size. When computing the extract position from the larger vector it uses the element size in bits of the original result vector to determine the number of elements in the smaller vector. That is wrong when lowering a compare as the vector element size of a bool vector does not have to agree with that of the compare operand. The following simplifies this, fixing the error. PR middle-end/118062 * tree-vect-generic.cc (expand_vector_piecewise): Properly compute delta.
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Marek Polacek authored
This crash started with my r12-7803 but I believe the problem lies elsewhere. build_vec_init has cleanup_flags whose purpose is -- if I grok this correctly -- to avoid destructing an object multiple times. Let's say we are initializing an array of A. Then we might end up in a scenario similar to initlist-eh1.C: try { call A::A in a loop // #0 try { call a fn using the array } finally { // #1 call A::~A in a loop } } catch { // #2 call A::~A in a loop } cleanup_flags makes us emit a statement like D.3048 = 2; at #0 to disable performing the cleanup at #2, since #1 will take care of the destruction of the array. But if we are not emitting the loop because we can use a constant initializer (and use a single { a, b, ...}), we shouldn't generate the statement resetting the iterator to its initial value. Otherwise we crash in gimplify_var_or_parm_decl because it gets the stray decl D.3048. PR c++/117985 gcc/cp/ChangeLog: * init.cc (build_vec_init): Pop CLEANUP_FLAGS if we're not generating the loop. gcc/testsuite/ChangeLog: * g++.dg/cpp0x/initlist-array23.C: New test. * g++.dg/cpp0x/initlist-array24.C: New test.
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Oliver Kozul authored
The patch optimizes code generation for comparisons of the form X & C1 == C2 by converting them to (X | ~C1) == (C2 | ~C1). C1 is a constant that requires li and addi to be loaded, while ~C1 requires a single lui instruction. As the values of C1 and C2 are not visible within the equality expression, a plus pattern is matched instead. PR target/114087 gcc/ChangeLog: * config/riscv/riscv.md (*lui_constraint<ANYI:mode>_and_to_or): New pattern gcc/testsuite/ChangeLog: * gcc.target/riscv/pr114087-1.c: New test.
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Yangyu Chen authored
There should be no svvptc in the riscv-ext-bitmask.def file since it has not yet been added to the RISC-V C API Specification or the Linux hwprobe. And there is no need for userspace software to know that this extension exists. So remove it from the riscv-ext-bitmask.def file. Fixes: e4f4b2dc ("RISC-V: Minimal support for svvptc extension.") Signed-off-by:
Yangyu Chen <cyy@cyyself.name> gcc/ChangeLog: * common/config/riscv/riscv-ext-bitmask.def (RISCV_EXT_BITMASK): Remove svvptc.
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Torbjörn SVENSSON authored
Test fails for Cortex-M0 with: .../pr81812.C:6:8: error: generic thunk code fails for method 'virtual void ChildNode::_ZTv0_n12_NK9ChildNode5errorEz(...) const' which uses '...' According to PR108277, it's expected that thumb1 targets does not support empty virtual functions with ellipsis. gcc/testsuite/ChangeLog: * g++.dg/torture/pr81812.C: Add xfail for thumb1. Signed-off-by:
Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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Anton Blanchard authored
This adds the Tenstorrent Ascalon 8 wide architecture (tt-ascalon-d8) to the list of known cores. gcc/ChangeLog: * config/riscv/riscv-cores.def: Add tt-ascalon-d8. * config/riscv/riscv.cc (tt_ascalon_d8_tune_info): New. * doc/invoke.texi (RISC-V): Add tt-ascalon-d8 to -mcpu. gcc/testsuite/ChangeLog: * gcc.target/riscv/mcpu-tt-ascalon-d8.c: New test.
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Anton Blanchard authored
gcc/ChangeLog * doc/invoke.texi (RISC-V): Add thead-c906, xiangshan-nanhu to -mcpu, add generic-ooo and remove thead-c906 from -mtune.
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Torbjörn SVENSSON authored
Fixes Linaro CI reported regression on r15-6164-gbdf75257aad2 in https://linaro.atlassian.net/browse/GNU-1463 . gcc/testsuite/ChangeLog: * lib/target-supports.exp: Added corresponding -mtune= option for each fo the arm_cpu_* effective targets. Signed-off-by:
Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
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Kito Cheng authored
Although this constraint is not currently used for any instructions, it is very useful for custom instructions. Additionally, some new standard extensions (not yet upstream), such as `Zilsd` and `Zclsd`, are potential users of this constraint. Therefore, I believe there is sufficient justification to add it now. gcc/ChangeLog: * config/riscv/constraints.md (R): New constraint. * doc/md.texi: Document new constraint `R`. gcc/testsuite/ChangeLog: * gcc.target/riscv/constraint-R.c: New.
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Kito Cheng authored
The modifier `N`, to print the raw encoding of a register. This is used when using `.insn <length>, <encoding>`, where the user wants to pass a value to the instruction in a known register, but where the instruction doesn't follow the existing instruction formats, so the assembly parser is not expecting a register name, just a raw integer. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_print_operand): Add N. * doc/extend.texi: Document for N, gcc/testsuite/ChangeLog: * gcc.target/riscv/modifier-N-fpr.c: New. * gcc.target/riscv/modifier-N-vr.c: New. * gcc.target/riscv/modifier-N.c: New.
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Kito Cheng authored
Here is a purposal that using N for printing register encoding number, so let rename the existing internal operand modifier `N` to `n`. gcc/ChangeLog: * config/riscv/corev.md (*cv_branch<mode>): Update modifier. (*branch<mode>): Ditto. * config/riscv/riscv.cc (riscv_print_operand): Update modifier. * config/riscv/riscv.md (*branch<mode>): Update modifier.