The std-clib.cc module definition file assumes that all names are
available unconditionally, but that's not true for all targets. Use the
same preprocessor conditions as are present in the <cxxx> headers.

A similar change is needed in std.cc.in for the <chrono> features that
depend on the SSO std::string, guarded with a __cpp_lib_chrono value
indicating full C++20 support.

The conditions for <cmath> are omitted from this change, as there are a
large number of them. That probably needs to be fixed.

libstdc++-v3/ChangeLog:

	PR libstdc++/118177
	* src/c++23/std-clib.cc.in: Use preprocessor conditions for
	names which are not always defined.
	* src/c++23/std.cc.in: Likewise.

libstdc++-v3/ChangeLog:

	* include/std/span: Fix indentation.

This commit implements P2447R6. The code is straightforward (just one
extra constructor, with constraints and conditional explicit).

I decided to suppress -Winit-list-lifetime because otherwise it would
give too many false positives. The new constructor is meant to be used
as a parameter-passing interface (this is a design choice, see
P2447R6/§2) and, as such, the initializer_list won't dangle despite
GCC's warnings.

The new constructor isn't 100% backwards compatible. A couple of
examples are included in Annex C, but I have also lifted some more
from R4. A new test checks for the old and the new behaviors.

libstdc++-v3/ChangeLog:

	* include/bits/version.def: Add the new feature-testing macro.
	* include/bits/version.h: Regenerate.
	* include/std/span: Add constructor from initializer_list.
	* testsuite/23_containers/span/init_list_cons.cc: New test.
	* testsuite/23_containers/span/init_list_cons_neg.cc: New test.

Signed-off-by: Giuseppe D'Angelo <giuseppe.dangelo@kdab.com>

Any std::span<T, N> constructor with a runtime length has a precondition
that the length is equal to N (except when N == std::dynamic_extent).

Currently every constructor with a runtime length does:

if constexpr (extent != dynamic_extent)
  __glibcxx_assert(n == extent);

We can move those assertions into the __detail::__extent_storage<N>
constructor so they are only done in one place. To avoid checking the
assertions when we have a constant length we can add a second
constructor which is consteval and takes a integral_constant<size_t, N>
argument. The std::span constructors can pass a size_t for runtime
lengths and a std::integral_constant<size_t, N> for constant lengths
that don't need to be checked.

The __detail::__extent_storage<dynamic_extent> specialization only needs
one constructor, as a std::integral_constant<size_t, N> argument can
implicitly convert to size_t.

For the member functions that return a subspan with a constant extent we
return std::span<T,C>(ptr, C) which is redundant in two ways. Repeating
the constant length C when it's already a template argument is
redundant, and using the std::span(T*, size_t) constructor implies a
runtime length which will do a redundant assertion check.  Even though
that assertion won't fail and should be optimized away, it's still
unnecessary code that doesn't need to be instantiated and then optimized
away again. We can avoid that by adding a new private constructor that
only takes a pointer (wrapped in a custom tag struct to avoid
accidentally using that constructor) and automatically sets _M_extent to
the correct value.

libstdc++-v3/ChangeLog:

	* include/std/span (__detail::__extent_storage): Check
	precondition in constructor. Add consteval constructor for valid
	lengths and deleted constructor for invalid constant lengths.
	Make member functions always_inline.
	(__detail::__span_ptr): New class template.
	(span): Adjust constructors to use a std::integral_constant
	value for constant lengths. Declare all specializations of
	std::span as friends.
	(span::first<C>, span::last<C>, span::subspan<O,C>): Use new
	private constructor.
	(span(__span_ptr<T>)): New private constructor for constant
	lengths.

std::regex builds a cache of equivalence classes by calling
std::regex_traits<char>::transform_primary(c) for every char, which then
calls std::collate<char>::transform which calls strxfrm. On several
targets strxfrm fails for non-ASCII characters. Because strxfrm has no
return value reserved to indicate an error, some implementations return
INT_MAX or SIZE_MAX. This causes std::collate::transform to try to
allocate a huge buffer, which is either very slow or throws
std::bad_alloc. We should check errno after calling strxfrm to detect
errors and then throw a more appropriate exception instead of trying to
allocate a huge buffer.

Unfortunately the std::collate<C>::_M_transform function has a
non-throwing exception specifier, so we can't do the error handling
there.

As well as checking errno, this patch changes std::collate::do_transform
to use __builtin_alloca for small inputs, and to use RAII to deallocate
the buffers used for large inputs.

This change isn't sufficient to fix the three std::regex bugs caused by
the lack of error handling in std::collate::do_transform, we also need
to make std::regex_traits::transform_primary handle exceptions. This
change also attempts to make transform_primary closer to the effects
described in the standard, by not even attempting to use std::collate if
the locale's std::collate facet has been replaced (see PR 118105).
Implementing the correct effects for transform_primary requires RTTI, so
that we don't use some user-defined std::collate facet with unknown
semantics. When -fno-rtti is used transform_primary just returns an
empty string, making equivalence classes unusable in std::basic_regex.
That's not ideal, but I don't have any better ideas.

I'm unsure if std::regex_traits<C>::transform_primary is supposed to
convert the string to lower case or not.  The general regex traits
requirements ([re.req] p20) do say "when character case is not
considered" but the specification for the std::regex_traits<char> and
std::regex_traits<wchar_t> specializations ([re.traits] p7) don't say
anything about that.

With the r15-6317-geb339c29ee42aa change, transform_primary is not
called unless the regex actually uses an equivalence class. But using an
equivalence class would still fail (or be incredibly slow) on some
targets. With this commit, equivalence classes should be usable on all
targets, without excessive memory allocations.

Arguably, we should not even try to call transform_primary for any char
values over 127, since they're never valid in locales that use UTF-8 or
7-bit ASCII, and probably for other charsets too. Handling 128
exceptions for every std::regex compilation is very inefficient, but at
least it now works instead of failing with std::bad_alloc, and no longer
allocates 128 x 2GB. Maybe for C++26 we could check the locale's
std::text_encoding and use that to decide whether to cache equivalence
classes for char values over 127.

libstdc++-v3/ChangeLog:

	PR libstdc++/85824
	PR libstdc++/94409
	PR libstdc++/98723
	PR libstdc++/118105
	* include/bits/locale_classes.tcc (collate::do_transform): Check
	errno after calling _M_transform. Use RAII type to manage the
	buffer and to restore errno.
	* include/bits/regex.h (regex_traits::transform_primary): Handle
	exceptions from std::collate::transform and do not try to use
	std::collate for user-defined facets.

The current check for negative times (i.e. before the epoch) only checks
for a negative number of seconds. For a time 1ms before the epoch the
seconds part will be zero, but the futex syscall will still fail with an
EINVAL error. Extend the check to handle this case.

This change adds a redundant check in the headers too, so that we avoid
even calling into the library for negative times. Both checks can be
marked [[unlikely]]. The check in the headers avoids the cost of
splitting the time into seconds and nanoseconds and then making a PLT
call. The check inside the library matches where we were checking
already, and fixes existing binaries that were compiled against older
headers but use a newer libstdc++.so.6 at runtime.

libstdc++-v3/ChangeLog:

	PR libstdc++/118093
	* include/bits/atomic_futex.h (_M_load_and_test_until_impl):
	Return false for times before the epoch.
	* src/c++11/futex.cc (_M_futex_wait_until): Extend check for
	negative times to check for subsecond times. Add unlikely
	attribute.
	(_M_futex_wait_until_steady): Likewise.
	* testsuite/30_threads/future/members/118093.cc: New test.

We have several overloads of std::deque::_M_insert_aux, one of which is
variadic and called by std::deque::emplace. With a suitable set of
arguments to emplace, it's possible for one of the non-variadic
_M_insert_aux overloads to be selected by overload resolution, making
emplace ill-formed.

Rename the variadic _M_insert_aux to _M_emplace_aux so that calls to
emplace never select an _M_insert_aux overload. Also add an inline
_M_insert_aux for the const lvalue overload that is called from
insert(const_iterator, const value_type&).

libstdc++-v3/ChangeLog:

	PR libstdc++/90389
	* include/bits/deque.tcc (_M_insert_aux): Rename variadic
	overload to _M_emplace_aux.
	* include/bits/stl_deque.h (_M_insert_aux): Define inline.
	(_M_emplace_aux): Declare.
	* testsuite/23_containers/deque/modifiers/emplace/90389.cc: New
	test.

Also add "@since C++11" to std::move, std::forward etc.

libstdc++-v3/ChangeLog:

	* include/bits/move.h (forward, move, move_if_noexcept, addressof):
	Add @since to Doxygen comments.
	(forward_like): Add Doxygen comment.

libstdc++-v3/ChangeLog:

	* doc/xml/manual/evolution.xml: Replace invalid <variable>
	elements with <varname>.
	* doc/html/*: Regenerate.

When CD-DCE creates forwarders to reduce false control dependences
it fails to update the irreducible state of edge and the forwarder
block in case the fowarder groups both normal (entry) and edges
from an irreducible region (necessarily backedges).  This is because
when we split the first edge, if that's a normal edge, the forwarder
and its edge to the original block will not be marked as part
of the irreducible region but when we then redirect an edge from
within the region it becomes so.

The following fixes this up.

Note I think creating a forwarder that includes backedges is
likely not going to help, but at this stage I don't want to change
the CFG going into DCE.  For regular loops we'll have a single
entry and a single backedge by means of loop init and will never
create a forwarder - so this is solely happening for irreducible
regions where it's harder to prove that such forwarder doesn't help.

	PR tree-optimization/117979
	* tree-ssa-dce.cc (make_forwarders_with_degenerate_phis):
	Properly update the irreducible region state.

	* gcc.dg/torture/pr117979.c: New testcase.

DWARF has voted in recently https://dwarfstd.org/issues/241209.1.html ,
which is basically just a guarantee that the DWARF 6 draft
DW_AT_language_{name,version} attribute codes and content of
https://dwarfstd.org/languages-v6.html can be used as an extension
in DWARF 5 and won't be changed.

So, this patch is an alternative to the
https://gcc.gnu.org/pipermail/gcc-patches/2024-November/669671.html
patch, which had the major problem that it required changing all the
DWARF consumers to be able to debug C17 or later or C++17 or later
sources.
This patch uses still DWARF 5 DW_LANG_C11 or DW_LANG_C_plus_plus_14,
the latest code in DWARF 5 proper, so all DWARF 5 capable consumers
should be able to deal with that, but additionally emits the
DWARF 6 attributes so that newer DWARF consumers can see it isn't
just C++14 but say C++23 or C11 but C23.  Consumers which don't know
those DWARF 6 attributes would just ignore them.  This is like any other
-gno-strict-dwarf extension, except that normally we emit say DWARF 5
codes where possible only after DWARF 5 is released, while in this case
there is a guarantee it can be used before DWARF 6 is released.

2025-01-08  Jakub Jelinek  <jakub@redhat.com>

include/
	* dwarf2.h (enum dwarf_source_language): Fix comment pasto.
	(enum dwarf_source_language_name): New type.
	* dwarf2.def (DW_AT_language_name, DW_AT_language_version): New
	DWARF 6 codes.
gcc/
	* dwarf2out.cc (break_out_comdat_types): Copy over
	DW_AT_language_{name,version} if present.
	(output_skeleton_debug_sections): Remove also
	DW_AT_language_{name,version}.
	(gen_compile_unit_die): For C17, C23, C2Y, C++17, C++20, C++23
	and C++26 emit for -gdwarf-5 -gno-strict-dwarf also
	DW_AT_language_{name,version} attributes.
gcc/testsuite/
	* g++.dg/debug/dwarf2/lang-cpp17.C: Add -gno-strict-dwarf to
	dg-options.  Check also for DW_AT_language_{name,version} values.
	* g++.dg/debug/dwarf2/lang-cpp20.C: Likewise.
	* g++.dg/debug/dwarf2/lang-cpp23.C: New test.

When nonlocal goto lowering creates an artificial label it fails
to adjust its context.

	PR middle-end/118325
	* tree-nested.cc (convert_nl_goto_reference): Assign proper
	context to generated artificial label.

	* gcc.dg/pr118325.c: New testcase.

When we create the SLP reduction chain epilogue for the PHIs for
the early exit we fail to properly classify the reduction as SLP
reduction chain.  The following fixes the corresponding checks.

	PR tree-optimization/118269
	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
	Use the correct stmt for the REDUC_GROUP_FIRST_ELEMENT lookup.

	* gcc.dg/vect/vect-early-break_131-pr118269.c: New testcase.

A recent commit mistakenly changed the field name for tuples from
'val' to '__val', but unlike SVE this name is mandated by ACLE.

The patch simply switches back the name to 'val'.

	PR target/118332

gcc/ChangeLog:

	* config/arm/arm-mve-builtins.cc (wrap_type_in_struct): Use 'val'
	instead of '__val'.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/pr118332.c: New test.

Removed powerpc*-*-* from the target test as it is always true. Simplified
options by removing -mpower9-misc and -mvsx, which are enabled by default with
-mdejagnu-cpu=power9. The has_arch_pwr9 check is also true with
-mdejagnu-cpu=power9, so it has been removed.

2025-01-08 Jeevitha Palanisamy <jeevitha@linux.ibm.com>

gcc/testsuite/

	* gcc.target/powerpc/amo1.c: Removed powerpc*-*-* from the target and
	simplified dg-options.
	* gcc.target/powerpc/amo2.c: Simplified dg-options and added powerpc_vsx
	target check.

In ISE056, the mnemonics for TCVTROWPS2PBF16[H,L] has been changed to
TCVTROWPS2BF16[H,L].

gcc/ChangeLog:

	* config/i386/amxavx512intrin.h
	(_tile_cvtrowps2pbf16h_internal): Rename to...
	(_tile_cvtrowps2bf16h_internal): ...this.
	(_tile_cvtrowps2pbf16hi_internal): Rename to...
	(_tile_cvtrowps2bf16hi_internal): ...this.
	(_tile_cvtrowps2pbf16l_internal): Rename to...
	(_tile_cvtrowps2bf16l_internal): ...this.
	(_tile_cvtrowps2pbf16li_internal): Rename to...
	(_tile_cvtrowps2bf16li_internal): ...this.
	(_tile_cvtrowps2pbf16h): Rename to...
	(_tile_cvtrowps2bf16h): ...this.
	(_tile_cvtrowps2pbf16hi): Rename to...
	(_tile_cvtrowps2bf16hi): ...this.
	(_tile_cvtrowps2pbf16l): Rename to...
	(_tile_cvtrowps2bf16l): ...this.
	(_tile_cvtrowps2pbf16li): Rename to...
	(_tile_cvtrowps2bf16li): ...this.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/amxavx512-asmatt-1.c: Adjust intrin call.
	* gcc.target/i386/amxavx512-asmintel-1.c: Ditto.
	* gcc.target/i386/amxavx512-cvtrowps2pbf16-2.c: Rename to...
	* gcc.target/i386/amxavx512-cvtrowps2bf16-2.c: ...this. Rename
	test functions.

For later processors, the pipeline went deeper so the penalty for
untaken branch can be larger than before. Add a new parameter
br_mispredict_scale to describe the penalty, and adopt to
noce_max_ifcvt_seq_cost hook to allow longer sequence to be
converted with cmove.

This improves cpu2017 544 with -Ofast -march=native for 14% on P-core
SPR, and 8% on E-core SRF. No other regression observed.

gcc/ChangeLog:

	* config/i386/i386.cc (ix86_noce_max_ifcvt_seq_cost): Adjust
	cost with ix86_tune_cost->br_mispredict_scale.
	* config/i386/i386.h (processor_costs): Add br_mispredict_scale.
	* config/i386/x86-tune-costs.h: Add new br_mispredict_scale to
	all processor_costs, in which icelake_cost/alderlake_cost
	with value COSTS_N_INSNS (2) + 3 and other processor with value
	COSTS_N_INSNS (2).

gcc/testsuite/ChangeLog:

	* gcc.target/i386/cmov12.c: New test.

Given the SAT_* patterns are grouped for each alu and signed or not,
add leading comments to indicate the beginning of the pattern.

gcc/ChangeLog:

	* match.pd: Update comments for sat_* pattern.

Signed-off-by: Pan Li <pan2.li@intel.com>

This patch would like to refactor the all signed SAT_* patterns for
the saturated value.  Aka, overflow to INT_MAX when > 0 and downflow
to INT_MIN when < 0.  Thus, we can remove sorts of duplicated expression
in different patterns.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.

gcc/ChangeLog:

	* match.pd: Extract saturated value match for signed SAT_*.

Signed-off-by: Pan Li <pan2.li@intel.com>

This patch would like to refactor the all signed SAT_TRUNC patterns,
aka:
* Extract type check outside.
* Re-arrange the related match pattern forms together.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.

gcc/ChangeLog:

	* match.pd: Refactor sorts of signed SAT_TRUNC match patterns

Signed-off-by: Pan Li <pan2.li@intel.com>

This patch would like to refactor the all signed SAT_ADD patterns,
aka:
* Extract type check outside.
* Re-arrange the related match pattern forms together.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.
* The x86 bootstrap test.
* The x86 fully regression test.

gcc/ChangeLog:

	* match.pd: Refactor sorts of signed SAT_SUB match patterns.

Signed-off-by: Pan Li <pan2.li@intel.com>

This improves codegen for x264 sum of absolute difference routines.
The insn count is same, but we avoid double widening ops and ensuing
whole register moves.

Also for more general applicability, we chose to implement abs diff
vs. the sum of abs diff variant.

Suggested-by: Robin Dapp <rdapp@ventanamicro.com>
Co-authored-by: Pan Li <pan2.li@intel.com>
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>

	PR target/117722

gcc/ChangeLog:
	* config/riscv/autovec.md: Add uabd expander.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr117722.c: New test.

Fix __extenddfxf2:

  * Remove bogus denorm handling block which would never execute --
    the converted exp value is always positive as EXCESSX > EXCESSD.

  * Compute the whole significand in dl instead of doing part of it in
    ldl.

    * Mask off exponent from dl.l.upper so the denorm shift test
      works.

    * Insert the hidden one bit into dl.l.upper as needed.

Fix __truncxfdf2 denorm handling. All that is required is to shift the
significand right by the correct amount; it already has all of the
necessary bits set including the explicit one. Compute the shift
amount, then perform the wide shift across both elements of the
significand.

Fix __fixxfsi:

  * The value  was off by a factor of two as the significand contains
    32 bits, not 31 so we need to shift by one more than the equivalent
    code in __fixdfsi.

  * Simplify the code having realized that the lower 32 bits of the
    significand can never appear in the results.

Return positive qNaN instead of negative. For floats, qNaN is 0x7fff_ffff. For
doubles, qNaN is 0x7fff_ffff_ffff_ffff.

Return correctly signed zero on float and double divide underflow. This means
that Ld$underflow now expects d7 to contain the sign bit, just like the other
return paths.

libgcc/
	* config/m68k/fpgnulib.c (extenddfxf2): Simplify code by removing code
	that should never execute.  Fix denorm shift test and insert hidden bit
	as needed.
	(__truncxfdf2): Properly compue and shift the significant right.
	* config/m68k/lb1sf68.S (__fixxfsi): Correct shift counts and simplify.
	(QUIET_NAN): Make it a positive quiet NaN and fix return values to inject
	sign properly.

Don't use the QI vector if its size is equal to UNITS_PER_WORD for
better code generation.

Before patch:

vsetivli        zero,4,e8,mf4,ta,ma
vmv.v.i v1,0
addi    a4,sp,12
vse8.v  v1,0(a4)

After patch:

sw      zero,12(sp)

gcc/
	* expr.cc (widest_fixed_size_mode_for_size): Prefer scalar modes
	over vector modes in more cases.

gcc/testsuite/

	* gcc.target/riscv/rvv/autovec/pr113469.c: Update expected output.
	* gcc.target/riscv/rvv/base/movqi-1.c: New test.

Tamar's recent improvement to improve affine unsigned folding for exchange2
twiddle code generation for a couple tests in the RVV testsuite just enough to
cause testsuite failures.

I've looked at both tests before/after Tamar's change and the code is clearly
better -- essentially tighter vector loops due to improvements in address
arithmetic.  Additionally we have fewer vsetvls after Tamar's patch.

Given that I'm just making the obvious adjustments to the expected assembly and
pushing to the trunk.

gcc/testsuite
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Update expected
	output.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Likewise.

gcc/testuite/
	* lib/target-supports.exp
	(check_effective_target_sync_char_short): Enable for riscv*-*-*.

gcc:
	PR target/118137
	* config/riscv/sync.md ("lrsc_atomic_exchange<mode>"): Apply mask
	to shifted value.

gcc/testsuite:
	PR target/118137
	* gcc.dg/atomic/pr118137.c: New.

This is a trivial bug that showed up after Mark W's recent patch to not apply
the size limit on jump tables.

The ft32 port has limited immediate ranges on comparisons and the casesi
expander didn't honor those.  It'd blindly pass along an out of range constant.

This patch adds the trivial adjustment to force an out of range constant into a
register.  It fixes these regressions:

> Tests that now fail, but worked before (3 tests):
>
> ft32-sim: gcc: gcc.c-torture/compile/pr34093.c   -O1  (test for excess errors)
> ft32-sim: gcc: gcc.dg/torture/pr106809.c   -O1  (test for excess errors)
> ft32-sim: gcc: gcc.dg/torture/pr106809.c   -O1  (test for excess errors)
Tested in my tester.    No other tests were fixed.

gcc/
	* config/ft32/ft32.md (casesi expander): Force operands[2] into
	a register if it's not a suitable rimm operand.

Many test cases explicitly set -march with extensions which are not
compatible with the E ABI variants.  This leads to spurious errors
when toolchain has been configured for RV32E base ISA and ILP32E ABI:

  spawn ... -march=rv32gc_zbb ...
  cc1: error: ILP32E ABI does not support the 'D' extension

Fix by skipping those tests if toolchain's default ABI is E.

gcc/testsuite/ChangeLog:

	* gcc.dg/pr90838-2.c: Skip if default ABI is E.
	* gcc.dg/pr90838.c: Ditto.
	* gcc.target/riscv/adddibeq.c: Ditto.
	* gcc.target/riscv/adddibfeq.c: Ditto.
	* gcc.target/riscv/adddibfge.c: Ditto.
	* gcc.target/riscv/adddibfgt.c: Ditto.
	* gcc.target/riscv/adddibfle.c: Ditto.
	* gcc.target/riscv/adddibflt.c: Ditto.
	* gcc.target/riscv/adddibfne.c: Ditto.
	* gcc.target/riscv/adddibge.c: Ditto.
	* gcc.target/riscv/adddibgeu.c: Ditto.
	* gcc.target/riscv/adddibgt.c: Ditto.
	* gcc.target/riscv/adddibgtu.c: Ditto.
	* gcc.target/riscv/adddible.c: Ditto.
	* gcc.target/riscv/adddibleu.c: Ditto.
	* gcc.target/riscv/adddiblt.c: Ditto.
	* gcc.target/riscv/adddibltu.c: Ditto.
	* gcc.target/riscv/adddibne.c: Ditto.
	* gcc.target/riscv/adddieq.c: Ditto.
	* gcc.target/riscv/adddifeq.c: Ditto.
	* gcc.target/riscv/adddifge.c: Ditto.
	* gcc.target/riscv/adddifgt.c: Ditto.
	* gcc.target/riscv/adddifle.c: Ditto.
	* gcc.target/riscv/adddiflt.c: Ditto.
	* gcc.target/riscv/adddifne.c: Ditto.
	* gcc.target/riscv/adddige.c: Ditto.
	* gcc.target/riscv/adddigeu.c: Ditto.
	* gcc.target/riscv/adddigt.c: Ditto.
	* gcc.target/riscv/adddigtu.c: Ditto.
	* gcc.target/riscv/adddile.c: Ditto.
	* gcc.target/riscv/adddileu.c: Ditto.
	* gcc.target/riscv/adddilt.c: Ditto.
	* gcc.target/riscv/adddiltu.c: Ditto.
	* gcc.target/riscv/adddine.c: Ditto.
	* gcc.target/riscv/addsibeq.c: Ditto.
	* gcc.target/riscv/addsibfeq.c: Ditto.
	* gcc.target/riscv/addsibfge.c: Ditto.
	* gcc.target/riscv/addsibfgt.c: Ditto.
	* gcc.target/riscv/addsibfle.c: Ditto.
	* gcc.target/riscv/addsibflt.c: Ditto.
	* gcc.target/riscv/addsibfne.c: Ditto.
	* gcc.target/riscv/addsibge.c: Ditto.
	* gcc.target/riscv/addsibgeu.c: Ditto.
	* gcc.target/riscv/addsibgt.c: Ditto.
	* gcc.target/riscv/addsibgtu.c: Ditto.
	* gcc.target/riscv/addsible.c: Ditto.
	* gcc.target/riscv/addsibleu.c: Ditto.
	* gcc.target/riscv/addsiblt.c: Ditto.
	* gcc.target/riscv/addsibltu.c: Ditto.
	* gcc.target/riscv/addsibne.c: Ditto.
	* gcc.target/riscv/addsieq.c: Ditto.
	* gcc.target/riscv/addsifeq.c: Ditto.
	* gcc.target/riscv/addsifge.c: Ditto.
	* gcc.target/riscv/addsifgt.c: Ditto.
	* gcc.target/riscv/addsifle.c: Ditto.
	* gcc.target/riscv/addsiflt.c: Ditto.
	* gcc.target/riscv/addsifne.c: Ditto.
	* gcc.target/riscv/addsige.c: Ditto.
	* gcc.target/riscv/addsigeu.c: Ditto.
	* gcc.target/riscv/addsigt.c: Ditto.
	* gcc.target/riscv/addsigtu.c: Ditto.
	* gcc.target/riscv/addsile.c: Ditto.
	* gcc.target/riscv/addsileu.c: Ditto.
	* gcc.target/riscv/addsilt.c: Ditto.
	* gcc.target/riscv/addsiltu.c: Ditto.
	* gcc.target/riscv/addsine.c: Ditto.
	* gcc.target/riscv/cmo-zicboz-zic64-1.c: Ditto.
	* gcc.target/riscv/cmpmemsi-2.c: Ditto.
	* gcc.target/riscv/cmpmemsi-3.c: Ditto.
	* gcc.target/riscv/cmpmemsi.c: Ditto.
	* gcc.target/riscv/cpymemsi-2.c: Ditto.
	* gcc.target/riscv/cpymemsi-3.c: Ditto.
	* gcc.target/riscv/cpymemsi.c: Ditto.
	* gcc.target/riscv/crc-builtin-zbc32.c: Ditto.
	* gcc.target/riscv/crc-builtin-zbc64.c: Ditto.
	* gcc.target/riscv/cset-sext-rtl.c: Ditto.
	* gcc.target/riscv/cset-sext-rtl32.c: Ditto.
	* gcc.target/riscv/cset-sext-sfb-rtl.c: Ditto.
	* gcc.target/riscv/cset-sext-sfb-rtl32.c: Ditto.
	* gcc.target/riscv/cset-sext-sfb.c: Ditto.
	* gcc.target/riscv/cset-sext-thead-rtl.c: Ditto.
	* gcc.target/riscv/cset-sext-thead.c: Ditto.
	* gcc.target/riscv/cset-sext-ventana-rtl.c: Ditto.
	* gcc.target/riscv/cset-sext-ventana.c: Ditto.
	* gcc.target/riscv/cset-sext-zicond-rtl.c: Ditto.
	* gcc.target/riscv/cset-sext-zicond-rtl32.c: Ditto.
	* gcc.target/riscv/cset-sext-zicond.c: Ditto.
	* gcc.target/riscv/cset-sext.c: Ditto.
	* gcc.target/riscv/matrix_add_const.c: Ditto.
	* gcc.target/riscv/movdibeq-thead.c: Ditto.
	* gcc.target/riscv/movdibeq-ventana.c: Ditto.
	* gcc.target/riscv/movdibeq-zicond.c: Ditto.
	* gcc.target/riscv/movdibeq.c: Ditto.
	* gcc.target/riscv/movdibfeq-ventana.c: Ditto.
	* gcc.target/riscv/movdibfeq-zicond.c: Ditto.
	* gcc.target/riscv/movdibfeq.c: Ditto.
	* gcc.target/riscv/movdibfge-ventana.c: Ditto.
	* gcc.target/riscv/movdibfge-zicond.c: Ditto.
	* gcc.target/riscv/movdibfge.c: Ditto.
	* gcc.target/riscv/movdibfgt-ventana.c: Ditto.
	* gcc.target/riscv/movdibfgt-zicond.c: Ditto.
	* gcc.target/riscv/movdibfgt.c: Ditto.
	* gcc.target/riscv/movdibfle-ventana.c: Ditto.
	* gcc.target/riscv/movdibfle-zicond.c: Ditto.
	* gcc.target/riscv/movdibfle.c: Ditto.
	* gcc.target/riscv/movdibflt-ventana.c: Ditto.
	* gcc.target/riscv/movdibflt-zicond.c: Ditto.
	* gcc.target/riscv/movdibflt.c: Ditto.
	* gcc.target/riscv/movdibfne-ventana.c: Ditto.
	* gcc.target/riscv/movdibfne-zicond.c: Ditto.
	* gcc.target/riscv/movdibfne.c: Ditto.
	* gcc.target/riscv/movdibge-thead.c: Ditto.
	* gcc.target/riscv/movdibge-ventana.c: Ditto.
	* gcc.target/riscv/movdibge-zicond.c: Ditto.
	* gcc.target/riscv/movdibge.c: Ditto.
	* gcc.target/riscv/movdibgeu-thead.c: Ditto.
	* gcc.target/riscv/movdibgeu-ventana.c: Ditto.
	* gcc.target/riscv/movdibgeu-zicond.c: Ditto.
	* gcc.target/riscv/movdibgeu.c: Ditto.
	* gcc.target/riscv/movdibgt-thead.c: Ditto.
	* gcc.target/riscv/movdibgt-ventana.c: Ditto.
	* gcc.target/riscv/movdibgt-zicond.c: Ditto.
	* gcc.target/riscv/movdibgt.c: Ditto.
	* gcc.target/riscv/movdibgtu-thead.c: Ditto.
	* gcc.target/riscv/movdibgtu-ventana.c: Ditto.
	* gcc.target/riscv/movdibgtu-zicond.c: Ditto.
	* gcc.target/riscv/movdibgtu.c: Ditto.
	* gcc.target/riscv/movdible-thead.c: Ditto.
	* gcc.target/riscv/movdible-ventana.c: Ditto.
	* gcc.target/riscv/movdible-zicond.c: Ditto.
	* gcc.target/riscv/movdible.c: Ditto.
	* gcc.target/riscv/movdibleu-thead.c: Ditto.
	* gcc.target/riscv/movdibleu-ventana.c: Ditto.
	* gcc.target/riscv/movdibleu-zicond.c: Ditto.
	* gcc.target/riscv/movdibleu.c: Ditto.
	* gcc.target/riscv/movdiblt-thead.c: Ditto.
	* gcc.target/riscv/movdiblt-ventana.c: Ditto.
	* gcc.target/riscv/movdiblt-zicond.c: Ditto.
	* gcc.target/riscv/movdiblt.c: Ditto.
	* gcc.target/riscv/movdibltu-thead.c: Ditto.
	* gcc.target/riscv/movdibltu-ventana.c: Ditto.
	* gcc.target/riscv/movdibltu-zicond.c: Ditto.
	* gcc.target/riscv/movdibltu.c: Ditto.
	* gcc.target/riscv/movdibne-thead.c: Ditto.
	* gcc.target/riscv/movdibne-ventana.c: Ditto.
	* gcc.target/riscv/movdibne-zicond.c: Ditto.
	* gcc.target/riscv/movdibne.c: Ditto.
	* gcc.target/riscv/movdieq-sfb.c: Ditto.
	* gcc.target/riscv/movdieq-thead.c: Ditto.
	* gcc.target/riscv/movdieq-ventana.c: Ditto.
	* gcc.target/riscv/movdieq-zicond.c: Ditto.
	* gcc.target/riscv/movdieq.c: Ditto.
	* gcc.target/riscv/movdifeq-sfb.c: Ditto.
	* gcc.target/riscv/movdifeq-thead.c: Ditto.
	* gcc.target/riscv/movdifeq-ventana.c: Ditto.
	* gcc.target/riscv/movdifeq-zicond.c: Ditto.
	* gcc.target/riscv/movdifeq.c: Ditto.
	* gcc.target/riscv/movdifge-sfb.c: Ditto.
	* gcc.target/riscv/movdifge-thead.c: Ditto.
	* gcc.target/riscv/movdifge-ventana.c: Ditto.
	* gcc.target/riscv/movdifge-zicond.c: Ditto.
	* gcc.target/riscv/movdifge.c: Ditto.
	* gcc.target/riscv/movdifgt-sfb.c: Ditto.
	* gcc.target/riscv/movdifgt-thead.c: Ditto.
	* gcc.target/riscv/movdifgt-ventana.c: Ditto.
	* gcc.target/riscv/movdifgt-zicond.c: Ditto.
	* gcc.target/riscv/movdifgt.c: Ditto.
	* gcc.target/riscv/movdifle-sfb.c: Ditto.
	* gcc.target/riscv/movdifle-thead.c: Ditto.
	* gcc.target/riscv/movdifle-ventana.c: Ditto.
	* gcc.target/riscv/movdifle-zicond.c: Ditto.
	* gcc.target/riscv/movdifle.c: Ditto.
	* gcc.target/riscv/movdiflt-sfb.c: Ditto.
	* gcc.target/riscv/movdiflt-thead.c: Ditto.
	* gcc.target/riscv/movdiflt-ventana.c: Ditto.
	* gcc.target/riscv/movdiflt-zicond.c: Ditto.
	* gcc.target/riscv/movdiflt.c: Ditto.
	* gcc.target/riscv/movdifne-sfb.c: Ditto.
	* gcc.target/riscv/movdifne-thead.c: Ditto.
	* gcc.target/riscv/movdifne-ventana.c: Ditto.
	* gcc.target/riscv/movdifne-zicond.c: Ditto.
	* gcc.target/riscv/movdifne.c: Ditto.
	* gcc.target/riscv/movdige-sfb.c: Ditto.
	* gcc.target/riscv/movdige-thead.c: Ditto.
	* gcc.target/riscv/movdige-ventana.c: Ditto.
	* gcc.target/riscv/movdige-zicond.c: Ditto.
	* gcc.target/riscv/movdige.c: Ditto.
	* gcc.target/riscv/movdigeu-sfb.c: Ditto.
	* gcc.target/riscv/movdigeu-thead.c: Ditto.
	* gcc.target/riscv/movdigeu-ventana.c: Ditto.
	* gcc.target/riscv/movdigeu-zicond.c: Ditto.
	* gcc.target/riscv/movdigeu.c: Ditto.
	* gcc.target/riscv/movdigt-sfb.c: Ditto.
	* gcc.target/riscv/movdigt-thead.c: Ditto.
	* gcc.target/riscv/movdigt-ventana.c: Ditto.
	* gcc.target/riscv/movdigt-zicond.c: Ditto.
	* gcc.target/riscv/movdigt.c: Ditto.
	* gcc.target/riscv/movdigtu-sfb.c: Ditto.
	* gcc.target/riscv/movdigtu-thead.c: Ditto.
	* gcc.target/riscv/movdigtu-ventana.c: Ditto.
	* gcc.target/riscv/movdigtu-zicond.c: Ditto.
	* gcc.target/riscv/movdigtu.c: Ditto.
	* gcc.target/riscv/movdile-sfb.c: Ditto.
	* gcc.target/riscv/movdile-thead.c: Ditto.
	* gcc.target/riscv/movdile-ventana.c: Ditto.
	* gcc.target/riscv/movdile-zicond.c: Ditto.
	* gcc.target/riscv/movdile.c: Ditto.
	* gcc.target/riscv/movdileu-sfb.c: Ditto.
	* gcc.target/riscv/movdileu-thead.c: Ditto.
	* gcc.target/riscv/movdileu-ventana.c: Ditto.
	* gcc.target/riscv/movdileu-zicond.c: Ditto.
	* gcc.target/riscv/movdileu.c: Ditto.
	* gcc.target/riscv/movdilt-sfb.c: Ditto.
	* gcc.target/riscv/movdilt-thead.c: Ditto.
	* gcc.target/riscv/movdilt-ventana.c: Ditto.
	* gcc.target/riscv/movdilt-zicond.c: Ditto.
	* gcc.target/riscv/movdilt.c: Ditto.
	* gcc.target/riscv/movdiltu-sfb.c: Ditto.
	* gcc.target/riscv/movdiltu-thead.c: Ditto.
	* gcc.target/riscv/movdiltu-ventana.c: Ditto.
	* gcc.target/riscv/movdiltu-zicond.c: Ditto.
	* gcc.target/riscv/movdiltu.c: Ditto.
	* gcc.target/riscv/movdine-sfb.c: Ditto.
	* gcc.target/riscv/movdine-thead.c: Ditto.
	* gcc.target/riscv/movdine-ventana.c: Ditto.
	* gcc.target/riscv/movdine-zicond.c: Ditto.
	* gcc.target/riscv/movdine.c: Ditto.
	* gcc.target/riscv/movsibeq-thead.c: Ditto.
	* gcc.target/riscv/movsibeq-ventana.c: Ditto.
	* gcc.target/riscv/movsibeq-zicond.c: Ditto.
	* gcc.target/riscv/movsibeq.c: Ditto.
	* gcc.target/riscv/movsibfeq-ventana.c: Ditto.
	* gcc.target/riscv/movsibfeq-zicond.c: Ditto.
	* gcc.target/riscv/movsibfeq.c: Ditto.
	* gcc.target/riscv/movsibfge-ventana.c: Ditto.
	* gcc.target/riscv/movsibfge-zicond.c: Ditto.
	* gcc.target/riscv/movsibfge.c: Ditto.
	* gcc.target/riscv/movsibfgt-ventana.c: Ditto.
	* gcc.target/riscv/movsibfgt-zicond.c: Ditto.
	* gcc.target/riscv/movsibfgt.c: Ditto.
	* gcc.target/riscv/movsibfle-ventana.c: Ditto.
	* gcc.target/riscv/movsibfle-zicond.c: Ditto.
	* gcc.target/riscv/movsibfle.c: Ditto.
	* gcc.target/riscv/movsibflt-ventana.c: Ditto.
	* gcc.target/riscv/movsibflt-zicond.c: Ditto.
	* gcc.target/riscv/movsibflt.c: Ditto.
	* gcc.target/riscv/movsibfne-ventana.c: Ditto.
	* gcc.target/riscv/movsibfne-zicond.c: Ditto.
	* gcc.target/riscv/movsibfne.c: Ditto.
	* gcc.target/riscv/movsibge-thead.c: Ditto.
	* gcc.target/riscv/movsibge-ventana.c: Ditto.
	* gcc.target/riscv/movsibge-zicond.c: Ditto.
	* gcc.target/riscv/movsibge.c: Ditto.
	* gcc.target/riscv/movsibgeu-thead.c: Ditto.
	* gcc.target/riscv/movsibgeu-ventana.c: Ditto.
	* gcc.target/riscv/movsibgeu-zicond.c: Ditto.
	* gcc.target/riscv/movsibgeu.c: Ditto.
	* gcc.target/riscv/movsibgt-thead.c: Ditto.
	* gcc.target/riscv/movsibgt-ventana.c: Ditto.
	* gcc.target/riscv/movsibgt-zicond.c: Ditto.
	* gcc.target/riscv/movsibgt.c: Ditto.
	* gcc.target/riscv/movsibgtu-thead.c: Ditto.
	* gcc.target/riscv/movsibgtu-ventana.c: Ditto.
	* gcc.target/riscv/movsibgtu-zicond.c: Ditto.
	* gcc.target/riscv/movsibgtu.c: Ditto.
	* gcc.target/riscv/movsible-thead.c: Ditto.
	* gcc.target/riscv/movsible-ventana.c: Ditto.
	* gcc.target/riscv/movsible-zicond.c: Ditto.
	* gcc.target/riscv/movsible.c: Ditto.
	* gcc.target/riscv/movsibleu-thead.c: Ditto.
	* gcc.target/riscv/movsibleu-ventana.c: Ditto.
	* gcc.target/riscv/movsibleu-zicond.c: Ditto.
	* gcc.target/riscv/movsibleu.c: Ditto.
	* gcc.target/riscv/movsiblt-thead.c: Ditto.
	* gcc.target/riscv/movsiblt-ventana.c: Ditto.
	* gcc.target/riscv/movsiblt-zicond.c: Ditto.
	* gcc.target/riscv/movsiblt.c: Ditto.
	* gcc.target/riscv/movsibltu-thead.c: Ditto.
	* gcc.target/riscv/movsibltu-ventana.c: Ditto.
	* gcc.target/riscv/movsibltu-zicond.c: Ditto.
	* gcc.target/riscv/movsibltu.c: Ditto.
	* gcc.target/riscv/movsibne-thead.c: Ditto.
	* gcc.target/riscv/movsibne-ventana.c: Ditto.
	* gcc.target/riscv/movsibne-zicond.c: Ditto.
	* gcc.target/riscv/movsibne.c: Ditto.
	* gcc.target/riscv/movsieq-sfb.c: Ditto.
	* gcc.target/riscv/movsieq-thead.c: Ditto.
	* gcc.target/riscv/movsieq-ventana.c: Ditto.
	* gcc.target/riscv/movsieq-zicond.c: Ditto.
	* gcc.target/riscv/movsieq.c: Ditto.
	* gcc.target/riscv/movsifeq-sfb.c: Ditto.
	* gcc.target/riscv/movsifeq-thead.c: Ditto.
	* gcc.target/riscv/movsifeq-ventana.c: Ditto.
	* gcc.target/riscv/movsifeq-zicond.c: Ditto.
	* gcc.target/riscv/movsifeq.c: Ditto.
	* gcc.target/riscv/movsifge-sfb.c: Ditto.
	* gcc.target/riscv/movsifge-thead.c: Ditto.
	* gcc.target/riscv/movsifge-ventana.c: Ditto.
	* gcc.target/riscv/movsifge-zicond.c: Ditto.
	* gcc.target/riscv/movsifge.c: Ditto.
	* gcc.target/riscv/movsifgt-sfb.c: Ditto.
	* gcc.target/riscv/movsifgt-thead.c: Ditto.
	* gcc.target/riscv/movsifgt-ventana.c: Ditto.
	* gcc.target/riscv/movsifgt-zicond.c: Ditto.
	* gcc.target/riscv/movsifgt.c: Ditto.
	* gcc.target/riscv/movsifle-sfb.c: Ditto.
	* gcc.target/riscv/movsifle-thead.c: Ditto.
	* gcc.target/riscv/movsifle-ventana.c: Ditto.
	* gcc.target/riscv/movsifle-zicond.c: Ditto.
	* gcc.target/riscv/movsifle.c: Ditto.
	* gcc.target/riscv/movsiflt-sfb.c: Ditto.
	* gcc.target/riscv/movsiflt-thead.c: Ditto.
	* gcc.target/riscv/movsiflt-ventana.c: Ditto.
	* gcc.target/riscv/movsiflt-zicond.c: Ditto.
	* gcc.target/riscv/movsiflt.c: Ditto.
	* gcc.target/riscv/movsifne-sfb.c: Ditto.
	* gcc.target/riscv/movsifne-thead.c: Ditto.
	* gcc.target/riscv/movsifne-ventana.c: Ditto.
	* gcc.target/riscv/movsifne-zicond.c: Ditto.
	* gcc.target/riscv/movsifne.c: Ditto.
	* gcc.target/riscv/movsige-sfb.c: Ditto.
	* gcc.target/riscv/movsige-thead.c: Ditto.
	* gcc.target/riscv/movsige-ventana.c: Ditto.
	* gcc.target/riscv/movsige-zicond.c: Ditto.
	* gcc.target/riscv/movsige.c: Ditto.
	* gcc.target/riscv/movsigeu-sfb.c: Ditto.
	* gcc.target/riscv/movsigeu-thead.c: Ditto.
	* gcc.target/riscv/movsigeu-ventana.c: Ditto.
	* gcc.target/riscv/movsigeu-zicond.c: Ditto.
	* gcc.target/riscv/movsigeu.c: Ditto.
	* gcc.target/riscv/movsigt-sfb.c: Ditto.
	* gcc.target/riscv/movsigt-thead.c: Ditto.
	* gcc.target/riscv/movsigt-ventana.c: Ditto.
	* gcc.target/riscv/movsigt-zicond.c: Ditto.
	* gcc.target/riscv/movsigt.c: Ditto.
	* gcc.target/riscv/movsigtu-sfb.c: Ditto.
	* gcc.target/riscv/movsigtu-thead.c: Ditto.
	* gcc.target/riscv/movsigtu-ventana.c: Ditto.
	* gcc.target/riscv/movsigtu-zicond.c: Ditto.
	* gcc.target/riscv/movsigtu.c: Ditto.
	* gcc.target/riscv/movsile-sfb.c: Ditto.
	* gcc.target/riscv/movsile-thead.c: Ditto.
	* gcc.target/riscv/movsile-ventana.c: Ditto.
	* gcc.target/riscv/movsile-zicond.c: Ditto.
	* gcc.target/riscv/movsile.c: Ditto.
	* gcc.target/riscv/movsileu-sfb.c: Ditto.
	* gcc.target/riscv/movsileu-thead.c: Ditto.
	* gcc.target/riscv/movsileu-ventana.c: Ditto.
	* gcc.target/riscv/movsileu-zicond.c: Ditto.
	* gcc.target/riscv/movsileu.c: Ditto.
	* gcc.target/riscv/movsilt-sfb.c: Ditto.
	* gcc.target/riscv/movsilt-thead.c: Ditto.
	* gcc.target/riscv/movsilt-ventana.c: Ditto.
	* gcc.target/riscv/movsilt-zicond.c: Ditto.
	* gcc.target/riscv/movsilt.c: Ditto.
	* gcc.target/riscv/movsiltu-sfb.c: Ditto.
	* gcc.target/riscv/movsiltu-thead.c: Ditto.
	* gcc.target/riscv/movsiltu-ventana.c: Ditto.
	* gcc.target/riscv/movsiltu-zicond.c: Ditto.
	* gcc.target/riscv/movsiltu.c: Ditto.
	* gcc.target/riscv/movsine-sfb.c: Ditto.
	* gcc.target/riscv/movsine-thead.c: Ditto.
	* gcc.target/riscv/movsine-ventana.c: Ditto.
	* gcc.target/riscv/movsine-zicond.c: Ditto.
	* gcc.target/riscv/movsine.c: Ditto.
	* gcc.target/riscv/pr111501.c: Ditto.
	* gcc.target/riscv/pr115921.c: Ditto.
	* gcc.target/riscv/pr116033.c: Ditto.
	* gcc.target/riscv/pr116035-1.c: Ditto.
	* gcc.target/riscv/pr116035-2.c: Ditto.
	* gcc.target/riscv/pr116131.c: Ditto.
	* gcc.target/riscv/reg_subreg_costs.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-slide.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector.c: Ditto.
	* gcc.target/riscv/rvv/xtheadvector/pr114194.c: Ditto.
	* gcc.target/riscv/sign-extend-rshift-32.c: Ditto.
	* gcc.target/riscv/sign-extend-rshift-64.c: Ditto.
	* gcc.target/riscv/sign-extend-rshift.c: Ditto.
	* gcc.target/riscv/synthesis-1.c: Ditto.
	* gcc.target/riscv/synthesis-10.c: Ditto.
	* gcc.target/riscv/synthesis-11.c: Ditto.
	* gcc.target/riscv/synthesis-12.c: Ditto.
	* gcc.target/riscv/synthesis-13.c: Ditto.
	* gcc.target/riscv/synthesis-14.c: Ditto.
	* gcc.target/riscv/synthesis-15.c: Ditto.
	* gcc.target/riscv/synthesis-16.c: Ditto.
	* gcc.target/riscv/synthesis-2.c: Ditto.
	* gcc.target/riscv/synthesis-3.c: Ditto.
	* gcc.target/riscv/synthesis-4.c: Ditto.
	* gcc.target/riscv/synthesis-5.c: Ditto.
	* gcc.target/riscv/synthesis-6.c: Ditto.
	* gcc.target/riscv/synthesis-7.c: Ditto.
	* gcc.target/riscv/synthesis-8.c: Ditto.
	* gcc.target/riscv/synthesis-9.c: Ditto.
	* gcc.target/riscv/target-attr-16.c: Ditto.
	* gcc.target/riscv/target-attr-norelax.c: Ditto.
	* gcc.target/riscv/xtheadba-addsl.c: Ditto.
	* gcc.target/riscv/xtheadba.c: Ditto.
	* gcc.target/riscv/xtheadbb-ext-1.c: Ditto.
	* gcc.target/riscv/xtheadbb-ext-2.c: Ditto.
	* gcc.target/riscv/xtheadbb-ext-3.c: Ditto.
	* gcc.target/riscv/xtheadbb-ext.c: Ditto.
	* gcc.target/riscv/xtheadbb-extu-1.c: Ditto.
	* gcc.target/riscv/xtheadbb-extu-2.c: Ditto.
	* gcc.target/riscv/xtheadbb-extu-4.c: Ditto.
	* gcc.target/riscv/xtheadbb-extu.c: Ditto.
	* gcc.target/riscv/xtheadbb-ff1.c: Ditto.
	* gcc.target/riscv/xtheadbb-rev.c: Ditto.
	* gcc.target/riscv/xtheadbb-srri.c: Ditto.
	* gcc.target/riscv/xtheadbb-strcmp.c: Ditto.
	* gcc.target/riscv/xtheadbb-strlen-unaligned.c: Ditto.
	* gcc.target/riscv/xtheadbb-strlen.c: Ditto.
	* gcc.target/riscv/xtheadbb.c: Ditto.
	* gcc.target/riscv/xtheadbs-tst.c: Ditto.
	* gcc.target/riscv/xtheadbs.c: Ditto.
	* gcc.target/riscv/xtheadcmo.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-indirect.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mvnez-imm-cond.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mvnez-reg-cond.c: Ditto.
	* gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c: Ditto.
	* gcc.target/riscv/xtheadcondmov.c: Ditto.
	* gcc.target/riscv/xtheadfmemidx-without-xtheadmemidx.c: Ditto.
	* gcc.target/riscv/xtheadfmemidx.c: Ditto.
	* gcc.target/riscv/xtheadfmv.c: Ditto.
	* gcc.target/riscv/xtheadint.c: Ditto.
	* gcc.target/riscv/xtheadmac-mula-muls.c: Ditto.
	* gcc.target/riscv/xtheadmac.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-index-update.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-index-xtheadbb-update.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-index-xtheadbb.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-index.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-modify-xtheadbb.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-modify.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-uindex-update.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-uindex-xtheadbb-update.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-uindex-xtheadbb.c: Ditto.
	* gcc.target/riscv/xtheadmemidx-uindex.c: Ditto.
	* gcc.target/riscv/xtheadmemidx.c: Ditto.
	* gcc.target/riscv/xtheadmempair-1.c: Ditto.
	* gcc.target/riscv/xtheadmempair-2.c: Ditto.
	* gcc.target/riscv/xtheadmempair-3.c: Ditto.
	* gcc.target/riscv/xtheadmempair-4.c: Ditto.
	* gcc.target/riscv/xtheadmempair-interrupt-fcsr.c: Ditto.
	* gcc.target/riscv/xtheadmempair.c: Ditto.
	* gcc.target/riscv/xtheadsync.c: Ditto.
	* gcc.target/riscv/za-ext.c: Ditto.
	* gcc.target/riscv/zawrs.c: Ditto.
	* gcc.target/riscv/zbb-strcmp-disabled-2.c: Ditto.
	* gcc.target/riscv/zbb-strcmp-disabled.c: Ditto.
	* gcc.target/riscv/zbb-strcmp-limit.c: Ditto.
	* gcc.target/riscv/zbb-strcmp-unaligned.c: Ditto.
	* gcc.target/riscv/zbb-strcmp.c: Ditto.
	* gcc.target/riscv/zbb-strlen-disabled-2.c: Ditto.
	* gcc.target/riscv/zbb-strlen-disabled.c: Ditto.
	* gcc.target/riscv/zbb-strlen-unaligned.c: Ditto.
	* gcc.target/riscv/zbb-strlen.c: Ditto.
	* gcc.target/riscv/zero-extend-rshift-32.c: Ditto.
	* gcc.target/riscv/zero-extend-rshift-64.c: Ditto.
	* gcc.target/riscv/zero-extend-rshift.c: Ditto.
	* gcc.target/riscv/zi-ext.c: Ditto.
	* gcc.target/riscv/zvbb.c: Ditto.
	* gcc.target/riscv/zvbc.c: Ditto.
	* gcc.target/riscv/zvkb.c: Ditto.
	* gcc.target/riscv/zvkg.c: Ditto.
	* gcc.target/riscv/zvkn-1.c: Ditto.
	* gcc.target/riscv/zvkn.c: Ditto.
	* gcc.target/riscv/zvknc-1.c: Ditto.
	* gcc.target/riscv/zvknc-2.c: Ditto.
	* gcc.target/riscv/zvknc.c: Ditto.
	* gcc.target/riscv/zvkned.c: Ditto.
	* gcc.target/riscv/zvkng-1.c: Ditto.
	* gcc.target/riscv/zvkng-2.c: Ditto.
	* gcc.target/riscv/zvkng.c: Ditto.
	* gcc.target/riscv/zvknha.c: Ditto.
	* gcc.target/riscv/zvknhb.c: Ditto.
	* gcc.target/riscv/zvks-1.c: Ditto.
	* gcc.target/riscv/zvks.c: Ditto.
	* gcc.target/riscv/zvksc-1.c: Ditto.
	* gcc.target/riscv/zvksc-2.c: Ditto.
	* gcc.target/riscv/zvksc.c: Ditto.
	* gcc.target/riscv/zvksed.c: Ditto.
	* gcc.target/riscv/zvksg-1.c: Ditto.
	* gcc.target/riscv/zvksg-2.c: Ditto.
	* gcc.target/riscv/zvksg.c: Ditto.
	* gcc.target/riscv/zvksh.c: Ditto.
	* gcc.target/riscv/zvkt.c: Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>

The tests are specifying -mcpu with D extension, which is not compatible
with the ILP32E and ILP64E ABIs.  Fix by skipping the tests if toolchain's
default ABI is an E variant.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/pr109508.c: Skip for E ABI.
	* gcc.target/riscv/pr114139.c: Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>

Some tests add options for V and Zvbb extensions, but those extensions
are not compatible with the E ABI variants.  This leads to spurious test
failures when toolchain's default ABI is ILP32E or ILP64E:

  spawn ... -march=rv32ecv_zvbb ...
  cc1: error: ILP32E ABI does not support the 'D' extension
  cc1: sorry, unimplemented: Currently the 'V' implementation requires the 'M' extension

Fix by skipping the tests when toolchain's default ABI is E variant.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/binop/vandn-1.c: Skip if default
	is E ABI.
	* gcc.target/riscv/rvv/autovec/binop/vrolr-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vwsll-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/binop/vwsll-template.h: Ditto.
	* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_64-12-zvbb.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/clz-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/ctz-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/popcount-1.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/popcount-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/unop/popcount-3.c: Ditto.
	* gcc.target/riscv/rvv/base/cmpmem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/cmpmem-3.c: Ditto.
	* gcc.target/riscv/rvv/base/cmpmem-4.c: Ditto.
	* gcc.target/riscv/rvv/base/cpymem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/cpymem-2.c: Ditto.
	* gcc.target/riscv/rvv/base/cpymem-3.c: Ditto.
	* gcc.target/riscv/rvv/base/movmem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/pr115068.c: Ditto.
	* gcc.target/riscv/rvv/base/setmem-1.c: Ditto.
	* gcc.target/riscv/rvv/base/setmem-2.c: Ditto.
	* gcc.target/riscv/rvv/base/setmem-3.c: Ditto.
	* gcc.target/riscv/rvv/base/vwaddsub-1.c: Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>

Add new effective target check for either ILP32E or ILP64E ABI variants.

Initial implementation only checks for RV32E or RV64E ISA, which in turn
implies that ILP32E/ILP64E ABI is used.  The RV32I+ILP32E and
RV64I+ILP64E combinations are not yet caught by the check, but they
do not seem to be widely used currently.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp (check_effective_target_riscv_abi_e):
	New procedure.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>

gcc/fortran/ChangeLog:

	* intrinsic.texi (ISO_FORTRAN_ENV):  Also mention INT8 in the
	text. Document UINT8, UINT16, UINT32 and UINT64.
	(ISO_C_BINDING): New table for unsigned KIND numbers.

The early scheduler takes up ~33% of the total build time, however it doesn't
provide a meaningful performance gain.  This is partly because modern OoO cores
need far less scheduling, partly because the scheduler tends to create many
unnecessary spills by increasing register pressure.  Building applications
56% faster is far more useful than ~0.1% improvement on SPEC, so switch off
early scheduling on AArch64.  Codesize reduces by ~0.2%.

Fix various tests that depend on scheduling by explicitly adding -fschedule-insns.

gcc:
	* common/config/aarch64/aarch64-common.cc: Switch off fschedule_insns.

gcc/testsuite:
	* gcc.dg/guality/pr36728-3.c: Remove XFAIL.
	* gcc.dg/guality/pr68860-1.c: Likewise.
	* gcc.dg/guality/pr68860-2.c: Likewise.
	* gcc.target/aarch64/ldp_aligned.c: Fix test.
	* gcc.target/aarch64/ldp_always.c: Likewise.
	* gcc.target/aarch64/ldp_stp_10.c: Add -fschedule-insns.
	* gcc.target/aarch64/ldp_stp_12.c: Likewise.
	* gcc.target/aarch64/ldp_stp_13.c: Remove test.
	* gcc.target/aarch64/ldp_stp_21.c: Add -fschedule-insns.
	* gcc.target/aarch64/ldp_stp_8.c: Likewise.
	* gcc.target/aarch64/ldp_vec_v2sf.c: Likewise.
	* gcc.target/aarch64/ldp_vec_v2si.c: Likewise.
	* gcc.target/aarch64/test_frame_16.c: Fix test.
	* gcc.target/aarch64/sve/vcond_12.c: Add -fschedule-insns.
	* gcc.target/aarch64/sve/acle/general/ldff1_3.c: Likewise.

The IRA combine_and_move pass runs if the scheduler is disabled and aggressively
combines moves.  The movsf/df patterns allow all FP immediates since they rely
on a split pattern.  However splits do not happen during IRA, so the result is
extra literal loads.  To avoid this, split early during expand and block
creation of FP immediates that need this split.  Mark a few testcases that
rely on late splitting as xfail.

double f(void) { return 128.0; }

-O2 -fno-schedule-insns gives:

	adrp	x0, .LC0
	ldr	d0, [x0, #:lo12:.LC0]
	ret

After patch:

	mov	x0, 4638707616191610880
	fmov	d0, x0
	ret

Passes bootstrap & regress, OK for commit?

gcc:
	* config/aarch64/aarch64.md (movhf_aarch64): Use aarch64_valid_fp_move.
	(movsf_aarch64): Likewise.
	(movdf_aarch64): Likewise.
	* config/aarch64/aarch64.cc (aarch64_valid_fp_move): New function.
	* config/aarch64/aarch64-protos.h (aarch64_valid_fp_move): Likewise.

gcc/testsuite:
	* gcc.target/aarch64/dbl_mov_immediate_1.c: Add xfail for -0.0.
	* gcc.target/aarch64/fmul_scvtf_1.c: Fixup test cases, add xfail,
	reduce duplication.

libgomp/ChangeLog:

	* libgomp.texi (OpenMP 6.0): Fix typo.
	(omp_get_default_device): Update the wording as the value
	returned by omp_get_initial_device is now ambiguous.
	(omp_get_num_devices): Minor wording tweak.
	(omp_get_initial_device): Note that the function may also
	return omp_initial_device since OpenMP 6.

This is a followup to
084ea8ad OpenMP: middle-end support for dispatch + adjust_args.

This patch fixes a bug that caused arguments in an OpenMP dispatch call to be
modified even when no variant substitution occurred.

gcc/ChangeLog:

	* gimplify.cc (gimplify_call_expr): Create variable
	variant_substituted_p to control whether adjust_args applies.

gcc/testsuite/ChangeLog:

	* c-c++-common/gomp/adjust-args-4.c: New test.

When the patch for PR114074 was applied we saw a good boost in exchange2.

This boost was partially caused by a simplification of the addressing modes.
With the patch applied IV opts saw the following form for the base addressing;

  Base: (integer(kind=4) *) &block + ((sizetype) ((unsigned long) l0_19(D) *
324) + 36)

vs what we normally get:

  Base: (integer(kind=4) *) &block + ((sizetype) ((integer(kind=8)) l0_19(D)
* 81) + 9) * 4

This is because the patch promoted multiplies where one operand is a constant
from a signed multiply to an unsigned one, to attempt to fold away the constant.

This patch attempts the same but due to the various problems with SCEV and
niters not being able to analyze the resulting forms (i.e. PR114322) we can't
do it during SCEV or in the general form like in fold-const like extract_muldiv
attempts.

Instead this applies the simplification during IVopts initialization when we
create the IV. This allows IV opts to see the simplified form without
influencing the rest of the compiler.

as mentioned in PR114074 it would be good to fix the missed optimization in the
other passes so we can perform this in general.

The reason this has a big impact on Fortran code is that Fortran doesn't seem to
have unsigned integer types.  As such all it's addressing are created with
signed types and folding does not happen on them due to the possible overflow.

concretely on AArch64 this changes the results from generation:

        mov     x27, -108
        mov     x24, -72
        mov     x23, -36
        add     x21, x1, x0, lsl 2
        add     x19, x20, x22
.L5:
        add     x0, x22, x19
        add     x19, x19, 324
        ldr     d1, [x0, x27]
        add     v1.2s, v1.2s, v15.2s
        str     d1, [x20, 216]
        ldr     d0, [x0, x24]
        add     v0.2s, v0.2s, v15.2s
        str     d0, [x20, 252]
        ldr     d31, [x0, x23]
        add     v31.2s, v31.2s, v15.2s
        str     d31, [x20, 288]
        bl      digits_20_
        cmp     x21, x19
        bne     .L5

into:

.L5:
        ldr     d1, [x19, -108]
        add     v1.2s, v1.2s, v15.2s
        str     d1, [x20, 216]
        ldr     d0, [x19, -72]
        add     v0.2s, v0.2s, v15.2s
        str     d0, [x20, 252]
        ldr     d31, [x19, -36]
        add     x19, x19, 324
        add     v31.2s, v31.2s, v15.2s
        str     d31, [x20, 288]
        bl      digits_20_
        cmp     x21, x19
        bne     .L5

The two patches together results in a 10% performance increase in exchange2 in
SPECCPU 2017 and a 4% reduction in binary size and a 5% improvement in compile
time. There's also a 5% performance improvement in fotonik3d and similar
reduction in binary size.

The patch folds every IV to unsigned to canonicalize them.  At the end of the
pass we match.pd will then remove unneeded conversions.

Note that we cannot force everything to unsigned, IVops requires that array
address expressions remain as such.  Folding them results in them becoming
pointer expressions for which some optimizations in IVopts do not run.

gcc/ChangeLog:

	PR tree-optimization/114932
	* tree-ssa-loop-ivopts.cc (alloc_iv): Perform affine unsigned fold.

gcc/testsuite/ChangeLog:

	PR tree-optimization/114932
	* gcc.dg/tree-ssa/pr64705.c: Update dump file scan.
	* gcc.target/i386/pr115462.c: The testcase shares 3 IVs which calculates
	the same thing but with a slightly different increment offset.  The test
	checks for 3 complex addressing loads, one for each IV.  But with this
	change they now all share one IV.  That is the loop now only has one
	complex addressing.  This is ultimately driven by the backend costing
	and the current costing says this is preferred so updating the testcase.
	* gfortran.dg/addressing-modes_1.f90: New test.

This is an expansion of the last patch to also track pointers via vector types and the
constructor that are used with vector types.
In this case we had:
```
_15 = (long unsigned int) &bias;
_10 = (long unsigned int) &cov_jn;
_12 = {_10, _15};
...

MEM[(struct vec *)&cov_jn] ={v} {CLOBBER(bob)};
bias ={v} {CLOBBER(bob)};
MEM[(struct function *)&D.6156] ={v} {CLOBBER(bob)};

...
MEM <vector(2) long unsigned int> [(void *)&D.6172 + 32B] = _12;
MEM[(struct function *)&D.6157] ={v} {CLOBBER(bob)};
```

Anyways tracking the pointers via vector types to say they are alive
at the point where the store of the vector happens fixes the bug by saying
it is alive at the same time as another variable is alive.

Bootstrapped and tested on x86_64-linux-gnu.

	PR tree-optimization/105769

gcc/ChangeLog:

	* cfgexpand.cc (vars_ssa_cache::operator()): For constructors
	walk over the elements.

gcc/testsuite/ChangeLog:

	* g++.dg/torture/pr105769-1.C: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>