When working on the PR117612 fix, I've noticed a pasto in
tree-ssa-phiopt.cc (spaceship_replacement).
The code is
      if (absu_hwi (tree_to_shwi (arg2)) != 1)
        return false;
      if (e1->flags & EDGE_TRUE_VALUE)
        {
          if (tree_to_shwi (arg0) != 2
              || absu_hwi (tree_to_shwi (arg1)) != 1
              || wi::to_widest (arg1) == wi::to_widest (arg2))
            return false;
        }
      else if (tree_to_shwi (arg1) != 2
               || absu_hwi (tree_to_shwi (arg0)) != 1
               || wi::to_widest (arg0) == wi::to_widest (arg1))
        return false;
where arg{0,1,2,3} are PHI args and wants to ensure that if e1 is a
true edge, then arg0 is 2 and one of arg{1,2} is -1 and one is 1,
otherwise arg1 is 2 and one of arg{0,2} is -1 and one is 1.
But due to pasto in the latte case doesn't verify that arg0
is different from arg2, it could be both -1 or both 1 and we wouldn't
punt.  The wi::to_widest (arg0) == wi::to_widest (arg1) test
is always false when we've made sure in the earlier conditions that
arg1 is 2 and arg0 is -1 or 1, so never 2.

2024-11-21  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/94589
	PR tree-optimization/117612
	* tree-ssa-phiopt.cc (spaceship_replacement): Fix up
	a pasto in check when arg1 is 2.

The following patch adds u{,l,ll,imax}abs builtins, which just fold
to ABSU_EXPR, similarly to how {,l,ll,imax}abs builtins fold to
ABS_EXPR.

2024-11-21  Jakub Jelinek  <jakub@redhat.com>

	PR c/117024
gcc/
	* coretypes.h (enum function_class): Add function_c2y_misc
	enumerator.
	* builtin-types.def (BT_FN_UINTMAX_INTMAX, BT_FN_ULONG_LONG,
	BT_FN_ULONGLONG_LONGLONG): New DEF_FUNCTION_TYPE_1s.
	* builtins.def (DEF_C2Y_BUILTIN): Define.
	(BUILT_IN_UABS, BUILT_IN_UIMAXABS, BUILT_IN_ULABS,
	BUILT_IN_ULLABS): New builtins.
	* builtins.cc (fold_builtin_abs): Handle also folding of u*abs
	to ABSU_EXPR.
	(fold_builtin_1): Handle BUILT_IN_U{,L,LL,IMAX}ABS.
gcc/lto/ChangeLog:
	* lto-lang.cc (flag_isoc2y): New variable.
gcc/ada/ChangeLog:
	* gcc-interface/utils.cc (flag_isoc2y): New variable.
gcc/testsuite/
	* gcc.c-torture/execute/builtins/lib/abs.c (uintmax_t): New typedef.
	(uabs, ulabs, ullabs, uimaxabs): New functions.
	* gcc.c-torture/execute/builtins/uabs-1.c: New test.
	* gcc.c-torture/execute/builtins/uabs-1.x: New file.
	* gcc.c-torture/execute/builtins/uabs-1-lib.c: New file.
	* gcc.c-torture/execute/builtins/uabs-2.c: New test.
	* gcc.c-torture/execute/builtins/uabs-2.x: New file.
	* gcc.c-torture/execute/builtins/uabs-2-lib.c: New file.
	* gcc.c-torture/execute/builtins/uabs-3.c: New test.
	* gcc.c-torture/execute/builtins/uabs-3.x: New test.
	* gcc.c-torture/execute/builtins/uabs-3-lib.c: New test.

As the associated test case shows, signbit generated assembly
is sub-optimal for _Float128 argument from memory on P8 LE.
On P8 LE, p8swap pass puts an explicit AND -16 on the memory,
which causes mode_dependent_address_p considers it's invalid
to change its mode and combine fails to make use of the
existing pattern signbit<SIGNBIT:mode>2_dm_mem.  Considering
it's always more efficient to make use of 8 bytes load and
shift on P8 LE, this patch is to adjust the current expander
and treat it specially.

	PR target/114567

gcc/ChangeLog:

	* config/rs6000/rs6000.md (expander signbit<FLOAT128:mode>2): Adjust.
	(*signbit<mode>2_dm_mem): Rename to ...
	(signbit<mode>2_dm_mem): ... this.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/pr114567.c: New test.

This patch is to adjust define_insn altivec_v{add,sub}uqm
with standard names, as the associated test case shows, w/o
this patch, it ends up with scalar {add,subf}c/{add,subf}e,
the standard names help to exploit v{add,sub}uqm.

gcc/ChangeLog:

	* config/rs6000/altivec.md (altivec_vadduqm): Rename to ...
	(addv1ti3): ... this.
	(altivec_vsubuqm): Rename to ...
	(subv1ti3): ... this.
	* config/rs6000/rs6000-builtins.def (__builtin_altivec_vadduqm):
	Replace bif expander altivec_vadduqm with addv1ti3.
	(__builtin_altivec_vsubuqm): Replace bif expander altivec_vsubuqm with
	subv1ti3.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/p8vector-int128-3.c: New test.

When making a patch to adjust VECTOR_P8_VECTOR rs6000_vector
enum, I noticed that V1TImode's mode attribute in VI_unit
VECTOR_UNIT_ALTIVEC_P (V1TImode) is never true, since
VECTOR_UNIT_ALTIVEC_P checks if vector_unit[V1TImode] is
equal to VECTOR_ALTIVEC, but vector_unit[V1TImode] can only
be VECTOR_NONE or VECTOR_P8_VECTOR, there is no chance to be
VECTOR_ALTIVEC:
  rs6000_vector_unit[V1TImode]
      = (TARGET_P8_VECTOR) ? VECTOR_P8_VECTOR : VECTOR_NONE;

By checking all uses of VI_unit, the used mode iterator is
one of VI2, VI, VP_small and VP, none of them has V1TImode,
so the entry for V1TImode is useless.  I guessed it was
designed to have one mode attribute to cover all integer
vector modes, but later we separated V1TI handlings to its
own patterns (those guarded with TARGET_VADDUQM).  Anyway,
this patch is to remove this useless and confusing entry.

gcc/ChangeLog:

	* config/rs6000/altivec.md (mode attr for V1TI in VI_unit): Remove.

When making patch to replace TARGET_P8_VECTOR, I noticed
for *eqv<BOOL_128:mode>3_internal1 unlike the other logical
operations, we only exploited the vsx version.  I think it
is an oversight, this patch is to consider veqv as well.

gcc/ChangeLog:

	* config/rs6000/rs6000.md (*eqv<BOOL_128:mode>3_internal1): Generate
	insn veqv if TARGET_ALTIVEC and operands are altivec_register_operand.

When working to get rid of mask bit OPTION_MASK_P8_VECTOR,
I noticed that the check on ISA_3_0_MASKS_IEEE is actually
to check TARGET_P9_VECTOR, since we check all three mask
bits together and p9 vector guarantees p8 vector and vsx
should be enabled.  So this patch is to adjust this first
as preparatory patch for the following patch to change
all uses of OPTION_MASK_P8_VECTOR and TARGET_P8_VECTOR.

gcc/ChangeLog:

	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_IEEE): Remove.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
	ISA_3_0_MASKS_IEEE check with TARGET_P9_VECTOR.

When I was making a patch to rework TARGET_P8_VECTOR, I
noticed that there are some redundant checks and dead code
related to TARGET_DIRECT_MOVE, so I made this patch as one
separated preparatory patch, it consists of:
  - Check either TARGET_DIRECT_MOVE or TARGET_P8_VECTOR only
    according to the context, rather than checking both of
    them since they are actually the same (TARGET_DIRECT_MOVE
    is defined as TARGET_P8_VECTOR).
  - Simplify TARGET_VSX && TARGET_DIRECT_MOVE as
    TARGET_DIRECT_MOVE since direct move ensures VSX enabled.
  - Replace some TARGET_POWERPC64 && TARGET_DIRECT_MOVE as
    TARGET_DIRECT_MOVE_64BIT to simplify it.
  - Remove some dead code guarded with TARGET_DIRECT_MOVE
    but the condition never holds here.

gcc/ChangeLog:

	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Simplify
	TARGET_P8_VECTOR && TARGET_DIRECT_MOVE as TARGET_P8_VECTOR.
	(rs6000_output_move_128bit): Simplify TARGET_VSX && TARGET_DIRECT_MOVE
	as TARGET_DIRECT_MOVE.
	* config/rs6000/rs6000.h (TARGET_XSCVDPSPN): Simplify conditions
	TARGET_DIRECT_MOVE || TARGET_P8_VECTOR as TARGET_P8_VECTOR.
	(TARGET_XSCVSPDPN): Likewise.
	(TARGET_DIRECT_MOVE_128): Simplify TARGET_DIRECT_MOVE &&
	TARGET_POWERPC64 as TARGET_DIRECT_MOVE_64BIT.
	(TARGET_VEXTRACTUB): Likewise.
	(TARGET_DIRECT_MOVE_64BIT): Simplify TARGET_P8_VECTOR &&
	TARGET_DIRECT_MOVE as TARGET_DIRECT_MOVE.
	* config/rs6000/rs6000.md (signbit<mode>2, @signbit<mode>2_dm,
	*signbit<mode>2_dm_mem, floatsi<mode>2_lfiwax,
	floatsi<SFDF:mode>2_lfiwax_<QHI:mode>_mem_zext,
	floatunssi<mode>2_lfiwzx, float<QHI:mode><SFDF:mode>2,
	*float<QHI:mode><SFDF:mode>2_internal, floatuns<QHI:mode><SFDF:mode>2,
	*floatuns<QHI:mode><SFDF:mode>2_internal, p8_mtvsrd_v16qidi2,
	p8_mtvsrd_df, p8_xxpermdi_<mode>, reload_vsx_from_gpr<mode>,
	p8_mtvsrd_sf, reload_vsx_from_gprsf, p8_mfvsrd_3_<mode>,
	reload_gpr_from_vsx<mode>, reload_gpr_from_vsxsf, unpack<mode>_dm):
	Simplify TARGET_DIRECT_MOVE && TARGET_POWERPC64 as
	TARGET_DIRECT_MOVE_64BIT.
	(unpack<mode>_nodm): Simplify !TARGET_DIRECT_MOVE || !TARGET_POWERPC64
	as !TARGET_DIRECT_MOVE_64BIT.
	(fix_trunc<mode>si2, fix_trunc<mode>si2_stfiwx,
	fix_trunc<mode>si2_internal): Simplify TARGET_P8_VECTOR &&
	TARGET_DIRECT_MOVE as TARGET_DIRECT_MOVE.
	(fix_trunc<mode>si2_stfiwx, fixuns_trunc<mode>si2_stfiwx): Remove some
	dead code as the guard TARGET_DIRECT_MOVE there never holds.
	(fixuns_trunc<mode>si2_stfiwx): Change TARGET_P8_VECTOR with
	TARGET_DIRECT_MOVE which is a better fit.
	* config/rs6000/vsx.md (define_peephole2 for SFmode in GPR): Simplify
	TARGET_DIRECT_MOVE && TARGET_POWERPC64 as TARGET_DIRECT_MOVE_64BIT.

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* g++.dg/opt/pr69175.C: Added option "-mcpu=unset".

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: Added option
	"-march=unset".
	* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: Likewise.
	* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: Likesie.
	* gcc.target/arm/cortex-m55-nofp-flag-hard.c: Likewise.
	* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: Likewise.
	* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: Likewise.
	* gcc.target/arm/cortex-m55-nomve-flag-hard.c: Likewise.
	* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: Likewise.
	* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: Likewise.
	* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* g++.dg/ext/pr57735.C: Use effective-target arm_cpu_xscale_arm.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* g++.target/arm/mve/general-c++/nomve_fp_1.c: Added option
	"-mcpu=unset".

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/vect-early-break-cbranch.c: Use
	effective-target arm_arch_v8a_hard.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* g++.target/arm/pr103676.C: Use effective-target
	arm_cpu_cortex_m7.
	* gcc.target/arm/no-volatile-in-it.c: Likewise.
	* gcc.target/arm/fma-sp.c: Use effective-target
	arm_cpu_cortex_m4_hard.
	* gcc.target/arm/pr53859.c: Use effective-target
	arm_cpu_cortex_m4.
	* gcc.target/arm/mve/intrinsics/pr97327.c: Use effective-target
	arm_cpu_cortex_m55.
	* gcc.target/arm/pr65067.c: Use effective-target
	arm_cpu_cortex_m3.
	* lib/target-supports.exp: Define effective-target
	arm_cpu_cortex_m3, arm_cpu_cortex_m4, arm_cpu_cortex_m4_hard,
	arm_cpu_cortex_m7 and arm_cpu_cortex_m55.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/thumb2-slow-flash-data-2.c: Use
	effective-target arm_arch_v7em_hard.
	* gcc.target/arm/thumb2-slow-flash-data-3.c: Likewise.
	* gcc.target/arm/thumb2-slow-flash-data-4.c: Likewise.
	* gcc.target/arm/thumb2-slow-flash-data-5.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/small-multiply-m0-1.c: Use effective-target
	arm_arch_v6m and added option "-march=unset".
	* gcc.target/arm/small-multiply-m0-2.c: Likewise.
	* gcc.target/arm/small-multiply-m0-3.c: Likewise.
	* gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
	* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
	* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
	* gcc.target/arm/small-multiply-m1-1.c: Likewise.
	* gcc.target/arm/small-multiply-m1-2.c: Likewise.
	* gcc.target/arm/small-multiply-m1-3.c: Likewise.
	* lib/target-supports.exp: Define effective-target
	arm_cpu_cortex_m0_small, arm_cpu_cortex_m0plus_small and
	arm_cpu_cortex_m1_small.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/pure-code/no-literal-pool-m0.c: Use
	effective-target arm_cpu_cortex-m0.
	* gcc.target/arm/pure-code/no-literal-pool-m23.c: Use
	effective-target arm_cpu_cortex-m23.
	* gcc.target/arm/pure-code/pr94538-1.c: Likewise.
	* gcc.target/arm/pure-code/pr109800.c: Use effective-target
	arm_arch_v7em_hard.
	* lib/target-supports.exp: Define effective-target
	arm_cpu_cortex_m0, arm_cpu_cortex_m23 and arm_arch_v7em_hard.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/acle/crc_hf_1.c: Use effective-target
	arm_arch_v8a_crc_hard.
	* lib/target-supports.exp: Define effective-target
	arm_arch_v8a_crc_hard.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/acle/pacbti-m-predef-1.c: Use effective-target
	arm_arch_v8_1m_main.
	* gcc.target/arm/acle/pacbti-m-predef-2.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise.
	* gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>

Update test cases to use -mcpu=unset/-march=unset feature introduced in
r15-3606-g7d6c6a0d15c.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/pac-1.c: Use effective-target
	arm_arch_v8_1m_main_pacbti.
	* gcc.target/arm/pac-2.c: Likewise.
	* gcc.target/arm/pac-3.c: Likewise.
	* gcc.target/arm/pac-4.c: Likewise.
	* gcc.target/arm/pac-5.c: Likewise.
	* gcc.target/arm/pac-7.c: Likewise.
	* gcc.target/arm/pac-8.c: Likewise.
	* gcc.target/arm/pac-9.c: Likewise.
	* gcc.target/arm/pac-10.c: Likewise.
	* gcc.target/arm/pac-11.c: Likewise.
	* gcc.target/arm/pac-12.c: Added option "-mcpu=unset".
	* gcc.target/arm/pac-13.c: Likewise.
	* gcc.target/arm/pac-14.c: Likewise.
	* lib/target-supports.exp
	(check_effective_target_arm_pacbti_hw): Likewise.
	* gcc.target/arm/pac-6.c: Use effective-target
	arm_arch_v8_1m_main.
	* gcc.target/arm/pac-15.c: Use effective-target
	arm_arch_v8_1m_main_pacbti and added option "-mcpu=unset".

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>

While testing future 64-bit location_t support, I ran into an
-fcompare-debug issue that was traced back here. Despite the name,
next_discriminator_for_locus() is meant to take an integer line number
argument, not a location_t. There is one call site which has been passing a
location_t instead. For the most part that is harmless, although in case
there are two CALL stmts on the same line with different location_t, it may
fail to generate a unique discriminator where it should. If/when location_t
changes to be 64-bit, however, it will produce an -fcompare-debug
failure. Fix it by passing the line number rather than the location_t.

I am not aware of a testcase that demonstrates any observable wrong
behavior, but the file debug/pr53466.C is an example where the discriminator
assignment is indeed different before and after this change.

gcc/ChangeLog:

	* tree-cfg.cc (assign_discriminators): Fix incorrect value passed to
	next_discriminator_for_locus().

Bump libgm2 version ready for the gcc-15 release.

libgm2/ChangeLog:

	PR modula2/117703
	* configure: Regenerate.
	* configure.ac (libtool_VERSION): Bump to 20:0:0.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>

When a symbol was use-associated in the ancestor of a submodule, a
PROTECTED attribute was ignored in the submodule or its descendants.
Find the real ancestor of symbols when used in a variable definition
context in a submodule.

	PR fortran/83135

gcc/fortran/ChangeLog:

	* expr.cc (sym_is_from_ancestor): New helper function.
	(gfc_check_vardef_context): Refine checking of PROTECTED attribute
	of symbols that are indirectly use-associated in a submodule.

gcc/testsuite/ChangeLog:

	* gfortran.dg/protected_10.f90: New test.

As reported in bug 114266, GCC fails to pedwarn for a compound
literal, whose type is an array of unknown size, initialized with an
empty initializer.  This case is disallowed by C23 (which doesn't have
zero-size objects); the case of a named object is diagnosed as
expected, but not that for compound literals.  (Before C23, the
pedwarn for empty initializers sufficed.)  Add a check for this
specific case with a pedwarn.

Bootstrapped with no regressions for x86_64-pc-linux-gnu.

	PR c/114266

gcc/c/
	* c-decl.cc (build_compound_literal): Diagnose array of unknown
	size with empty initializer for C23.

gcc/testsuite/
	* gcc.dg/c23-empty-init-4.c: New test.

gcc/jit/ChangeLog:

	* docs/topics/compatibility.rst (LIBGCCJIT_ABI_34): New ABI tag.
	* docs/topics/contexts.rst: Document gcc_jit_context_set_output_ident.
	* jit-playback.cc (set_output_ident): New method.
	* jit-playback.h (set_output_ident): New method.
	* jit-recording.cc (recording::context::set_output_ident,
	recording::output_ident::output_ident,
	recording::output_ident::~output_ident,
	recording::output_ident::replay_into,
	recording::output_ident::make_debug_string,
	recording::output_ident::write_reproducer): New methods.
	* jit-recording.h (class output_ident): New class.
	* libgccjit.cc (gcc_jit_context_set_output_ident): New function.
	* libgccjit.h (gcc_jit_context_set_output_ident): New function.
	* libgccjit.map: New function.

gcc/testsuite/ChangeLog:

	* jit.dg/all-non-failing-tests.h: New test.
	* jit.dg/test-output-ident.c: New test.

gcc/jit/ChangeLog:

	* docs/topics/compatibility.rst (LIBGCCJIT_ABI_33): New ABI tag.
	* docs/topics/functions.rst: Document gcc_jit_function_new_temp.
	* jit-playback.cc (new_local): Add support for temporary
	variables.
	* jit-recording.cc (recording::function::new_temp): New method.
	(recording::local::write_reproducer): Support temporary
	variables.
	* jit-recording.h (new_temp): New method.
	* libgccjit.cc (gcc_jit_function_new_temp): New function.
	* libgccjit.h (gcc_jit_function_new_temp): New function.
	* libgccjit.map: New function.

gcc/testsuite/ChangeLog:

	* jit.dg/all-non-failing-tests.h: Mention test-temp.c.
	* jit.dg/test-temp.c: New test.

On i686 PR116587 test compilation resulted in LRA failure to find
registers for a reload insn pseudo.  The insn requires 6 regs for 4
reload insn pseudos where two of them require 2 regs each.  But we
have only 5 free regs as sp is a fixed reg, bp is fixed because of
-fno-omit-frame-pointer, bx is assigned to pic_offset_table_pseudo
because of -fPIC.  LRA spills pic_offset_table_pseudo as the last
chance approach to allocate registers to the reload pseudo.  Although
it makes 2 free registers for the unallocated reload pseudo requiring
also 2 regs, the pseudo still can not be allocated as the 2 free regs
are disjoint.  The patch spills all pseudos conflicting with the
unallocated reload pseudo including already allocated reload insn
pseudos, then standard LRA code allocates spilled pseudos requiring
more one register first and avoid situation of the disjoint regs for
reload pseudos requiring more one reg.

gcc/ChangeLog:

	PR target/116587
	* lra-assigns.cc (find_all_spills_for): Consider all pseudos whose
	classes intersect given pseudo class.

gcc/testsuite/ChangeLog:

	PR target/116587
	* gcc.target/i386/pr116587.c: New test.

gcc/jit/ChangeLog:
	PR jit/108762
	* docs/topics/compatibility.rst (LIBGCCJIT_ABI_32): New ABI tag.
	* docs/topics/functions.rst: Add documentation for the function
	gcc_jit_context_get_target_builtin_function.
	* dummy-frontend.cc: Include headers target.h, jit-recording.h,
	print-tree.h, unordered_map and string, new variables (target_builtins,
	target_function_types, and target_builtins_ctxt), new function
	(tree_type_to_jit_type).
	* jit-builtins.cc: Specify that the function types are not from
	target builtins.
	* jit-playback.cc: New argument is_target_builtin to new_function.
	* jit-playback.h: New argument is_target_builtin to
	new_function.
	* jit-recording.cc: New argument is_target_builtin to
	new_function_type, function_type constructor and function
	constructor, new function
	(get_target_builtin_function).
	* jit-recording.h: Include headers string and unordered_map, new
	variable target_function_types, new argument is_target_builtin
	to new_function_type, function_type and function, new functions
	(get_target_builtin_function, copy).
	* libgccjit.cc: New function
	(gcc_jit_context_get_target_builtin_function).
	* libgccjit.h: New function
	(gcc_jit_context_get_target_builtin_function).
	* libgccjit.map: New functions
	(gcc_jit_context_get_target_builtin_function).

gcc/testsuite:
	PR jit/108762
	* jit.dg/all-non-failing-tests.h: New test test-target-builtins.c.
	* jit.dg/test-target-builtins.c: New test.

This fixes a few aarch64 specific testcases after the move to default to GNU C23.
For the SME testcases, the GNU C23 cases as `()` changing to mean `(void)` instead
of a non-prototype declaration; the non-prototype declaration merging was confusing
some of the time so the updated way is the expected way even for that.
For pic-*.c `-Wno-old-style-definition` was added not to warn about old style definitions.
For pr113573.c, I added `-std=gnu17` since I was not sure if `(...)` with C23 would invoke
the same issue.

tested for aarch64-linux-gnu.

	PR testsuite/117680
gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pic-constantpool1.c: Add -Wno-old-style-definition.
	* gcc.target/aarch64/pic-symrefplus.c: Likewise.
	* gcc.target/aarch64/pr113573.c: Add `-std=gnu17`
	* gcc.target/aarch64/sme/streaming_mode_1.c: Correct testcase.
	* gcc.target/aarch64/sme/za_state_1.c: Likewise.
	* gcc.target/aarch64/sme/za_state_2.c: Likewise.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

reuse_rtx is not documented nor the format to use it is ever documented.
So it should not be supported for the .md files.

This also fixes the problem if an invalid index is supplied for reuse_rtx,
instead of ICEing, put out a real error message.  Note since this code
still uses atoi, an invalid index can still be used in some cases but that is
recorded as part of PR 44574.

Note I did a grep of the sources to make sure that this was only used for
the read rtl in the GCC rather than while reading in .md files.

Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

	* read-md.h (class rtx_reader): Don't include m_reuse_rtx_by_id
	when GENERATOR_FILE is defined.
	* read-rtl.cc (rtx_reader::read_rtx_code): Disable reuse_rtx
	support when GENERATOR_FILE is defined.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

RISC-V vector currently does not support big endian so the postcommit
was getting the sorry, not implemented error on vector targets. Restrict
the testcase to non-vector targets

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/pr117595.c: Restrict to non vector targets.

Signed-off-by: Edwin Lu <ewlu@rivosinc.com>

When diverting to VMAT_GATHER_SCATTER we fail to zero *poffset
which was previously set if a load was classified as
VMAT_CONTIGUOUS_REVERSE.  The following refactors
get_group_load_store_type a bit to avoid this but this all needs
some serious TLC.

	PR tree-optimization/117709
	* tree-vect-stmts.cc (get_group_load_store_type): Only
	set *poffset when we end up with VMAT_CONTIGUOUS_DOWN
	or VMAT_CONTIGUOUS_REVERSE.

When SLP vectorizing we fail to mark the general alignment check
as irrelevant when using VMAT_STRIDED_SLP (the implementation checks
for itself) and when VMAT_INVARIANT the override isn't effective.

This results in extra FAILs on sparc which the following fixes.

	PR tree-optimization/117698
	* tree-vect-stmts.cc (get_group_load_store_type): Properly
	disregard alignment for VMAT_STRIDED_SLP and VMAT_INVARIANT.
	(vectorizable_load): Adjust guard for dumping whether we
	vectorize and unaligned access.
	(vectorizable_store): Likewise.

gcc/jit/ChangeLog:

	* jit-common.h: Add forward declaration of memento_of_get_aligned.
	* jit-recording.h (type::is_same_type_as): Compare integer
	types.
	(dyn_cast_aligned_type): New method.
	(type::is_aligned, memento_of_get_aligned::is_same_type_as,
	memento_of_get_aligned::is_aligned): new methods.

gcc/testsuite/ChangeLog:

	* jit.dg/test-types.c: Add checks comparing aligned types.

gcc/jit/ChangeLog:

	* docs/topics/contexts.rst: Add documentation for new option.
	* jit-recording.cc (recording::context::get_str_option): New
	method.
	* jit-recording.h (get_str_option): New method.
	* libgccjit.cc (gcc_jit_context_new_function): Allow special
	characters in function names.
	* libgccjit.h (enum gcc_jit_str_option): New option.

gcc/testsuite/ChangeLog:

	* jit.dg/test-special-chars.c: New test.

gcc/jit/ChangeLog:
	PR jit/112602
	* docs/topics/compatibility.rst (LIBGCCJIT_ABI_31): New ABI tag.
	* docs/topics/expressions.rst: Document
	gcc_jit_context_new_rvalue_vector_perm and
	gcc_jit_context_new_vector_access.
	* jit-playback.cc (playback::context::new_rvalue_vector_perm,
	common_mark_addressable_vec,
	gnu_vector_type_p,
	lvalue_p,
	convert_vector_to_array_for_subscript,
	new_vector_access): new functions.
	* jit-playback.h (new_rvalue_vector_perm, new_vector_access):
	New functions.
	* jit-recording.cc (recording::context::new_rvalue_vector_perm,
	recording::context::new_vector_access,
	memento_of_new_rvalue_vector_perm,
	recording::memento_of_new_rvalue_vector_perm::replay_into,
	recording::memento_of_new_rvalue_vector_perm::visit_children,
	recording::memento_of_new_rvalue_vector_perm::make_debug_string,
	recording::memento_of_new_rvalue_vector_perm::write_reproducer,
	recording::vector_access::replay_into,
	recording::vector_access::visit_children,
	recording::vector_access::make_debug_string,
	recording::vector_access::write_reproducer): New methods.
	* jit-recording.h (class memento_of_new_rvalue_vector_perm,
	class vector_access): New classes.
	* libgccjit.cc (gcc_jit_context_new_vector_access,
	gcc_jit_context_new_rvalue_vector_perm): New functions.
	* libgccjit.h (gcc_jit_context_new_rvalue_vector_perm,
	gcc_jit_context_new_vector_access): New functions.
	* libgccjit.map: New functions.

gcc/testsuite/ChangeLog:
	PR jit/112602
	* jit.dg/all-non-failing-tests.h: New test test-vector-perm.c.
	* jit.dg/test-vector-perm.c: New test.

gcc/testsuite/ChangeLog:

	* c-c++-common/gomp/declare-variant-2.c: Adjust dg-error directives.
	* c-c++-common/gomp/adjust-args-1.c: New test.
	* c-c++-common/gomp/adjust-args-2.c: New test.
	* c-c++-common/gomp/declare-variant-dup-match-clause.c: New test.
	* c-c++-common/gomp/dispatch-1.c: New test.
	* c-c++-common/gomp/dispatch-2.c: New test.
	* c-c++-common/gomp/dispatch-3.c: New test.
	* c-c++-common/gomp/dispatch-4.c: New test.
	* c-c++-common/gomp/dispatch-5.c: New test.
	* c-c++-common/gomp/dispatch-6.c: New test.
	* c-c++-common/gomp/dispatch-7.c: New test.
	* c-c++-common/gomp/dispatch-8.c: New test.
	* c-c++-common/gomp/dispatch-9.c: New test.
	* c-c++-common/gomp/dispatch-10.c: New test.

libgomp/ChangeLog:

	* testsuite/libgomp.c-c++-common/dispatch-1.c: New test.
	* testsuite/libgomp.c-c++-common/dispatch-2.c: New test.

This patch adds C++ support for the `dispatch` construct and the `adjust_args`
clause. It relies on the c-family bits comprised in the corresponding C front
end patch for pragmas and attributes.

Additional C/C++ common testcases are provided in a subsequent patch in the
series.

gcc/cp/ChangeLog:

	* decl.cc (omp_declare_variant_finalize_one): Set adjust_args
	need_device_ptr attribute.
	* parser.cc (cp_parser_direct_declarator): Update call to
	cp_parser_late_return_type_opt.
	(cp_parser_late_return_type_opt): Add 'tree parms' parameter. Update
	call to cp_parser_late_parsing_omp_declare_simd.
	(cp_parser_omp_clause_name): Handle nocontext and novariants clauses.
	(cp_parser_omp_clause_novariants): New function.
	(cp_parser_omp_clause_nocontext): Likewise.
	(cp_parser_omp_all_clauses): Handle PRAGMA_OMP_CLAUSE_NOVARIANTS and
	PRAGMA_OMP_CLAUSE_NOCONTEXT.
	(cp_parser_omp_dispatch_body): New function, inspired from
	cp_parser_assignment_expression and cp_parser_postfix_expression.
	(OMP_DISPATCH_CLAUSE_MASK): Define.
	(cp_parser_omp_dispatch): New function.
	(cp_finish_omp_declare_variant): Add parameter. Handle adjust_args
	clause.
	(cp_parser_late_parsing_omp_declare_simd): Add parameter. Update calls
	to cp_finish_omp_declare_variant and cp_finish_omp_declare_variant.
	(cp_parser_omp_construct): Handle PRAGMA_OMP_DISPATCH.
	(cp_parser_pragma): Likewise.
	* semantics.cc (finish_omp_clauses): Handle OMP_CLAUSE_NOCONTEXT and
	OMP_CLAUSE_NOVARIANTS.
	* pt.cc (tsubst_omp_clauses): Handle OMP_CLAUSE_NOCONTEXT and
	OMP_CLAUSE_NOVARIANTS.
	(tsubst_stmt): Handle OMP_DISPATCH.
	(tsubst_expr): Handle IFN_GOMP_DISPATCH.

gcc/testsuite/ChangeLog:

	* g++.dg/gomp/adjust-args-1.C: New test.
	* g++.dg/gomp/adjust-args-2.C: New test.
	* g++.dg/gomp/adjust-args-3.C: New test.
	* g++.dg/gomp/dispatch-1.C: New test.
	* g++.dg/gomp/dispatch-2.C: New test.
	* g++.dg/gomp/dispatch-3.C: New test.
	* g++.dg/gomp/dispatch-4.C: New test.
	* g++.dg/gomp/dispatch-5.C: New test.
	* g++.dg/gomp/dispatch-6.C: New test.
	* g++.dg/gomp/dispatch-7.C: New test.

This patch adds support to the C front-end to parse the `dispatch` construct and
the `adjust_args` clause. It also includes some common C/C++ bits for pragmas
and attributes.

Additional common C/C++ testcases are in a later patch in the series.

gcc/c-family/ChangeLog:

	* c-attribs.cc (c_common_gnu_attributes): Add attribute for adjust_args
	need_device_ptr.
	* c-omp.cc (c_omp_directives): Uncomment dispatch.
	* c-pragma.cc (omp_pragmas): Add dispatch.
	* c-pragma.h (enum pragma_kind): Add PRAGMA_OMP_DISPATCH.
	(enum pragma_omp_clause): Add PRAGMA_OMP_CLAUSE_NOCONTEXT and
	PRAGMA_OMP_CLAUSE_NOVARIANTS.

gcc/c/ChangeLog:

	* c-parser.cc (c_parser_omp_dispatch): New function.
	(c_parser_omp_clause_name): Handle nocontext and novariants clauses.
	(c_parser_omp_clause_novariants): New function.
	(c_parser_omp_clause_nocontext): Likewise.
	(c_parser_omp_all_clauses): Handle nocontext and novariants clauses.
	(c_parser_omp_dispatch_body): New function adapted from
	c_parser_expr_no_commas.
	(OMP_DISPATCH_CLAUSE_MASK): Define.
	(c_parser_omp_dispatch): New function.
	(c_finish_omp_declare_variant): Parse adjust_args.
	(c_parser_omp_construct): Handle PRAGMA_OMP_DISPATCH.
	* c-typeck.cc (c_finish_omp_clauses): Handle OMP_CLAUSE_NOVARIANTS and
	OMP_CLAUSE_NOCONTEXT.

gcc/testsuite/ChangeLog:

	* gcc.dg/gomp/adjust-args-1.c: New test.
	* gcc.dg/gomp/dispatch-1.c: New test.
	* gcc.dg/gomp/dispatch-2.c: New test.
	* gcc.dg/gomp/dispatch-3.c: New test.
	* gcc.dg/gomp/dispatch-4.c: New test.
	* gcc.dg/gomp/dispatch-5.c: New test.