This is a follow up patch for the previous patch adjusting
powerpc_vsx_ok with powerpc_vsx, focusing on those test cases
which don't really require VSX feature but used powerpc_vsx_ok
before, they actually require some other effective target check,
like some of them just require ALTIVEC feature, some of them
just require hard float support, and some of them just require
ISA 2.06 etc..

By the way, ppc-fpconv-4.c is the only one missing powerpc_fprs
among ppc-fpconv-*.c after this replacement, so I also fix it
here.

	PR testsuite/114842

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/bswap64-2.c: Replace powerpc_vsx_ok check with
	has_arch_pwr7.
	* gcc.target/powerpc/ppc-fpconv-2.c: Replace powerpc_vsx_ok check with
	powerpc_fprs.
	* gcc.target/powerpc/ppc-fpconv-6.c: Likewise.
	* gcc.target/powerpc/ppc-pow.c: Likewise.
	* gcc.target/powerpc/ppc-target-1.c: Likewise.
	* gcc.target/powerpc/ppc-target-2.c: Likewise.
	* gcc.target/powerpc/ppc-target-3.c: Likewise.
	* gcc.target/powerpc/ppc-target-4.c: Likewise.
	* gcc.target/powerpc/ppc-fpconv-4.c: Check for powerpc_fprs.
	* gcc.target/powerpc/fold-vec-select-char.c: Replace powerpc_vsx_ok
	with powerpc_altivec check and move it after dg-options line.
	* gcc.target/powerpc/fold-vec-select-float.c: Likewise.
	* gcc.target/powerpc/fold-vec-select-int.c: Likewise.
	* gcc.target/powerpc/fold-vec-select-short.c: Likewise.
	* gcc.target/powerpc/p9-novsx.c: Likewise.
	* gcc.target/powerpc/p9-options-1.c: Likewise.

Checking the existing powerpc_{altivec,vsx}_ok test cases,
I found there are some test cases which don't require the
checks powerpc_{altivec,vsx} even, some of them already
have other effective target check which can cover check
powerpc_{altivec,vsx}, or some of them don't actually
require VSX/AltiVec feature at all.  So this patch is to
remove such useless checks.

	PR testsuite/114842

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/amo2.c: Remove powerpc_vsx_ok effective target
	check as p9vector_hw already covers it.
	* gcc.target/powerpc/p9-sign_extend-runnable.c: Likewise.
	* gcc.target/powerpc/clone2.c: Remove powerpc_vsx_ok effective target
	check as ppc_cpu_supports_hw already covers it.
	* gcc.target/powerpc/pr47251.c: Remove powerpc_vsx_ok effective target
	check as it doesn't need VSX.
	* gcc.target/powerpc/pr60137.c: Likewise.
	* gcc.target/powerpc/pr80098-1.c: Likewise.
	* gcc.target/powerpc/pr80098-2.c: Likewise.
	* gcc.target/powerpc/pr80098-3.c: Likewise.
	* gcc.target/powerpc/sd-pwr6.c: Likewise.
	* gcc.target/powerpc/pr57744.c: Remove powerpc_vsx_ok effective target
	check and option -mvsx as it doesn't need VSX.
	* gcc.target/powerpc/pr69548.c: Remove powerpc_vsx_ok effective target
	check as it doesn't need VSX, remove lp64 and use int128 instead.
	* gcc.target/powerpc/vec-cmpne-long.c: Remove powerpc_vsx_ok effective
	target check as p8vector_hw already covers it.
	* gcc.target/powerpc/darwin-save-world-1.c: Remove powerpc_altivec_ok
	effective target check as vmx_hw already covers it.

Different from p9vector_hw, vmx_hw/vsx_hw/p8vector_hw checks
can still succeed without Altivec/VSX feature support.  We
have many runnable test cases only checking for these *_hw
without extra checking for if Altivec/VSX feature enabled or
not.  It means they can fail if being tested by explicitly
disabling Altivec/VSX.  So I think it's reasonable to check
if Altivec/VSX feature is enabled too while checking testing
environment is able to execute some instructions since these
instructions reply on these features.  So similar to what we
test for p9vector_hw, this patch is to modify C functions
used for vmx_hw, vsx_hw and p8vector_hw with according vector
types and constraints.  For p8vector_hw, excepting for VSX
feature, it also requires ISA 2.7 support.  A good thing is
that now almost all of the test cases using p8vector_hw have
specified -mdejagnu-cpu=power8 always or if !has_arch_pwr8.
Considering checking _ARCH_PWR8 in p8vector_hw can stop test
cases being tested even if test case itself has specified
-mdejagnu-cpu=power8, this patch doesn't force p8vector_hw to
check _ARCH_PWR8, instead it updates all existing test cases
which adopt p8vector_hw but don't have -mdejagnu-cpu=power8.
By the way, all test cases adopting p9vector_hw are all fine.

gcc/testsuite/ChangeLog:

	* lib/target-supports.exp (check_vsx_hw_available): Modify C source
	code used for testing with type vector long long and constraint wa
	which require VSX feature.
	(check_p8vector_hw_available): Likewise.
	(check_vmx_hw_available): Modify C source code used for testing with
	type vector int and constraint v which require Altivec feature.
	* gcc.target/powerpc/divkc3-1.c: Specify -mdejagnu-cpu=power8 for
	!has_arch_pwr8 to ensure power8 support.
	* gcc.target/powerpc/mulkc3-1.c: Likewise.
	* gcc.target/powerpc/pr96264.c: Likewise.

	* MAINTAINERS: Changing my email to gnu email.

Update warning test info for RISC-V target, compared on godbolt:

https://godbolt.org/z/Mexd3dfcc

gcc/testsuite/ChangeLog:

	* gcc.dg/Wstringop-overflow-47.c: Remove xfail target.

gcc/testsuite/
	* g++.dg/vect/pr115278.cc: Make cast's type agree with
	assignment destination WRITE.

Deduction guides are represented as 'normal' functions currently, and
have no special handling in modules.  However, this causes some issues;
by [temp.deduct.guide] a deduction guide is not found by normal name
lookup and instead all reachable deduction guides for a class template
should be considered, but this does not happen currently.

To solve this, this patch ensures that all deduction guides are
considered exported to ensure that they are always visible to importers
if they are reachable.  Another alternative here would be to add a new
kind of "all reachable" flag to name lookup, but that is complicated by
some difficulties in handling GM entities; this may be a better way to
go if more kinds of entities end up needing this handling, however.

Another issue here is that because deduction guides are "unrelated"
functions, they will usually get discarded from the GMF, so this patch
ensures that when finding dependencies, GMF deduction guides will also
have bindings created.  We do this in find_dependencies so that we don't
unnecessarily create bindings for GMF deduction guides that are never
reached; for consistency we do this for *all* deduction guides, not just
GM ones.  We also make sure that the opposite (a deduction guide being
the only purview reference to a GMF template) correctly marks it as
reachable.

Finally, when merging deduction guides from multiple modules, the name
lookup code may now return two-dimensional overload sets, so update
callers to match.

As a small drive-by improvement this patch also updates the error pretty
printing code to add a space before the '->' when printing a deduction
guide, so we get 'S(int) -> S<int>' instead of 'S(int)-> S<int>'.

	PR c++/115231

gcc/cp/ChangeLog:

	* error.cc (dump_function_decl): Add a space before '->' when
	printing deduction guides.
	* module.cc (depset::hash::add_binding_entity): Don't create
	bindings for guides here, only mark dependencies.
	(depset::hash::add_deduction_guides): New.
	(depset::hash::find_dependencies): Add deduction guide
	dependencies for a class template.
	(module_state::write_cluster): Always consider deduction guides
	as exported.
	* pt.cc (deduction_guides_for): Use 'lkp_iterator' instead of
	'ovl_iterator'.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/dguide-1_a.C: New test.
	* g++.dg/modules/dguide-1_b.C: New test.
	* g++.dg/modules/dguide-2_a.C: New test.
	* g++.dg/modules/dguide-2_b.C: New test.
	* g++.dg/modules/dguide-3_a.C: New test.
	* g++.dg/modules/dguide-3_b.C: New test.
	* g++.dg/modules/dguide-3_c.C: New test.
	* g++.dg/modules/dguide-3_d.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

When forgetting the '<>' on an explicit specialisation, the suggested
fixit hint suggests to add 'template <>', but naively applying will
cause nonsense results like 'template template <> struct S<int> {};'.

Instead check if we're currently parsing an explicit instantiation, and
if so inform about the issue (an instantiation cannot have a class body)
and suggest a fixit of simply '<>' to create a specialisation instead.

gcc/cp/ChangeLog:

	* parser.cc (cp_parser_class_head): Clarify error message for
	explicit instantiations.

gcc/testsuite/ChangeLog:

	* g++.dg/template/explicit-instantiation9.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

testsuite/
	* gcc.dg/vect/tsvc/tsvc.h (iterations): Allow to override,
	default to 10.
	(get_expected_result): Add values for iterations counts
	10, 256 and 3200.
	(run): Add code to output values for new iterations counts.
	* gcc.dg/vect/tsvc/vect-tsvc-s1119.c (dg-additional-options):
	Add -Diterations=LEN_2D .
	* gcc.dg/vect/tsvc/vect-tsvc-s115.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s119.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s125.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s2102.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s2233.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s2275.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s231.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s235.c: Likewise.
	* gcc.dg/vect/tsvc/vect-tsvc-s176.c: (dg-additional-options):
	Add -Diterations=3200 .
	[!run_expensive_tests]: dg-additional-options "-DTRUNCATE_TEST" .
	[TRUNCATE_TEST]: Set m to 32.

The .SAT_TRUNC vect pattern recog is valid when the lhs type has
its mode precision.  For example as below, QImode with 1 bit precision
like _Bool is invalid here.

g_12 = (long unsigned int) _2;
_13 = MIN_EXPR <g_12, 1>;
_3 = (_Bool) _13;

The above pattern cannot be recog as .SAT_TRUNC (g_12) because the dest
only has 1 bit precision with QImode mode.  Aka the type doesn't have
the mode precision.

The below tests are passed for this patch.
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.

	PR target/116202

gcc/ChangeLog:

	* tree-vect-patterns.cc (vect_recog_sat_trunc_pattern): Add the
	type_has_mode_precision_p check for the lhs type.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pr116202-run-1.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>

Due to recent middle-end change, update the .SAT_TRUNC expand dump
check from 2 to 4.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/unop/vec_sat_u_trunc-1.c: Adjust
	asm check times from 2 to 4.

Signed-off-by: Pan Li <pan2.li@intel.com>
Signed-off-by: Pan Li <pan2.li@intel.com>

In recent versions of GCC we've been diagnosing more and more kinds of
errors inside a template ahead of time.  This is a largely good thing
because it catches bugs, typos, dead code etc sooner.

But if the template never gets instantiated then such errors are harmless
and can be inconvenient to work around if say the code in question is
third party and in maintenance mode.  So it'd be handy to be able to
prevent these template errors from rendering the entire TU uncompilable.
(Note that such code is "ill-formed no diagnostic required" according
the standard.)

To that end this patch turns any errors issued within a template into
permerrors associated with a new -Wtemplate-body flag so that they can
be downgraded via e.g. -fpermissive or -Wno-error=template-body.  If
the template containing a downgraded error later needs to be instantiated,
we'll issue an error then.  But if the template never gets instantiated
then the downgraded error won't affect validity of the rest of the TU.

This is implemented via a diagnostic hook that gets called for each
diagnostic, and which adjusts an error diagnostic appropriately if we
detect it's occurring from a template context, and additionally flags
the template as erroneous.

For example the new testcase permissive-error1a.C gives:

gcc/testsuite/g++.dg/template/permissive-error1a.C: In function 'void f()':
gcc/testsuite/g++.dg/template/permissive-error1a.C:7:5: warning: increment of read-only variable 'n' [-Wtemplate-body]
    7 |   ++n;
      |     ^
...
gcc/testsuite/g++.dg/template/permissive-error1a.C: In instantiation of 'void f() [with T = int]':
gcc/testsuite/g++.dg/template/permissive-error1a.C:26:9:   required from here
   26 |   f<int>();
      |   ~~~~~~^~
gcc/testsuite/g++.dg/template/permissive-error1a.C:5:6: error: instantiating erroneous template
    5 | void f() {
      |      ^
gcc/testsuite/g++.dg/template/permissive-error1a.C:7:5: note: first error appeared here
    7 |   ++n; // {
      |     ^
...

	PR c++/116064

gcc/c-family/ChangeLog:

	* c.opt (Wtemplate-body): New warning.

gcc/cp/ChangeLog:

	* cp-tree.h (erroneous_templates_t): Declare.
	(erroneous_templates): Declare.
	(cp_seen_error): Declare.
	(seen_error): #define to cp_seen_error.
	* error.cc (get_current_template): Define.
	(relaxed_template_errors): Define.
	(cp_adjust_diagnostic_info): Define.
	(cp_seen_error): Define.
	(cxx_initialize_diagnostics): Set
	diagnostic_context::m_adjust_diagnostic_info.
	* module.cc (finish_module_processing): Don't write the
	module if it contains an erroneous template.
	* pt.cc (maybe_diagnose_erroneous_template): Define.
	(instantiate_class_template): Call it.
	(instantiate_decl): Likewise.

gcc/ChangeLog:

	* diagnostic.cc (diagnostic_context::initialize): Set
	m_adjust_diagnostic_info.
	(diagnostic_context::report_diagnostic): Call
	m_adjust_diagnostic_info.
	* diagnostic.h (diagnostic_context::m_adjust_diagnostic_info):
	New data member.
	* doc/invoke.texi (-Wno-template-body): Document.
	(-fpermissive): Mention -Wtemplate-body.

gcc/testsuite/ChangeLog:

	* g++.dg/ext/typedef-init.C: Downgrade error inside template
	to warning due to -fpermissive.
	* g++.dg/pr84492.C: Likewise.
	* g++.old-deja/g++.pt/crash51.C: Remove unneeded dg-options.
	* g++.dg/template/permissive-error1.C: New test.
	* g++.dg/template/permissive-error1a.C: New test.
	* g++.dg/template/permissive-error1b.C: New test.
	* g++.dg/template/permissive-error1c.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>

	PR fortran/109105

gcc/fortran/ChangeLog:

	* resolve.cc (CHECK_INTERFACES): New helper macro.
	(resolve_operator): Replace use of snprintf with
	gfc_error.

After r15-2414-g2d105efd6f60 which fixed the dg-do directive, the testcase
stopped working because there was a missing -save-temps. This adds that and
now the testcase passes again.

Pushed as obvious.

gcc/testsuite/ChangeLog:

	PR testsuite/116207
	* gcc.target/aarch64/simd/vmmla.c: Add -save-temps to the
	options.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>

libstdc++-v3/ChangeLog:

	PR libstdc++/116247
	* include/bits/fs_path.h: Use __UINTPTR_TYPE__ instead of
	uintptr_t.
	* include/bits/shared_ptr_atomic.h: Likewise.
	* include/ext/pointer.h: Include <stdint.h>.

Previously the invocation's "executionSuccessful" property (§3.20.14)
was only false if there was an ICE.

Update it so that it will also be false if we will exit with a non-zero
exit code (due to errors, Werror, and "sorry").

gcc/ChangeLog:
	PR other/116177
	* diagnostic-format-sarif.cc (sarif_invocation::prepare_to_flush):
	If the diagnostics would lead to us exiting with a failure code,
	then emit "executionSuccessful": False (SARIF v2.1.0 section
	§3.20.14).
	* diagnostic.cc (diagnostic_context::execution_failed_p): New.
	* diagnostic.h (diagnostic_context::execution_failed_p): New decl.
	* toplev.cc (toplev::main): Use it for determining returned value.

gcc/testsuite/ChangeLog:
	PR other/116177
	* gcc.dg/sarif-output/include-chain-2.c: Remove pruning of
	"exit status is 1", as we expect this to exit with 0.
	* gcc.dg/sarif-output/no-diagnostics.c: New test.
	* gcc.dg/sarif-output/test-include-chain-1.py
	(test_execution_unsuccessful): Add.
	* gcc.dg/sarif-output/test-include-chain-2.py
	(test_execution_successful): Add.
	* gcc.dg/sarif-output/test-missing-semicolon.py
	(test_execution_unsuccessful): Add.
	* gcc.dg/sarif-output/test-no-diagnostics.py: New test.
	* gcc.dg/sarif-output/test-werror.py: New test.
	* gcc.dg/sarif-output/werror.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>

Gather and scatters are not usually beneficial when the loop count is small.
This is because there's not only a cost to their execution within the loop but
there is also some cost to enter loops with them.

As such this patch models this overhead.  For generic tuning we however still
prefer gathers/scatters when the loop costs work out.

gcc/ChangeLog:

	* config/aarch64/aarch64-protos.h (struct sve_vec_cost): Add
	gather_load_x32_init_cost and gather_load_x64_init_cost.
	* config/aarch64/aarch64.cc (aarch64_vector_costs): Add
	m_sve_gather_scatter_init_cost.
	(aarch64_vector_costs::add_stmt_cost): Use them.
	(aarch64_vector_costs::finish_cost): Likewise.
	* config/aarch64/tuning_models/a64fx.h: Update.
	* config/aarch64/tuning_models/cortexx925.h: Update.
	* config/aarch64/tuning_models/generic.h: Update.
	* config/aarch64/tuning_models/generic_armv8_a.h: Update.
	* config/aarch64/tuning_models/generic_armv9_a.h: Update.
	* config/aarch64/tuning_models/neoverse512tvb.h: Update.
	* config/aarch64/tuning_models/neoversen2.h: Update.
	* config/aarch64/tuning_models/neoversen3.h: Update.
	* config/aarch64/tuning_models/neoversev1.h: Update.
	* config/aarch64/tuning_models/neoversev2.h: Update.
	* config/aarch64/tuning_models/neoversev3.h: Update.
	* config/aarch64/tuning_models/neoversev3ae.h: Update.

gcc:
	* doc/gm2.texi (Limitations): Rephrase. Remove invalid link.

Host systems with only MMX and no SSE2 should be really rare now.
Let's remove the MMX code path to keep the number of custom
implementations the same.

The SSE2 code path is also somewhat dubious now (nearly everything
should have SSE4 4.2 which is >15 years old now), but the SSE2
code path is used as fallback for others and also apparently
Solaris uses it due to tool chain deficiencies.

libcpp/ChangeLog:

	* lex.cc (search_line_mmx): Remove function.
	(init_vectorized_lexer): Remove search_line_mmx.

The constant C must be an integral multiple of the shift value in
the above optimization.  Non integral values can occur evaluating
IMAGPART_EXPR when the shadd constant is 8 and we have SFmode.

2024-08-06  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

	PR target/113384
	* config/pa/pa.cc (hppa_legitimize_address): Add check to
	ensure constant is an integral multiple of shift the value.

This fixes typos in function names and executed code.

gcc/ChangeLog:

	* config/riscv/riscv-target-attr.cc (num_occurences_in_str): Rename...
	(num_occurrences_in_str): here.
	(riscv_process_target_attr): Update num_occurences_in_str callsite.
	* config/riscv/riscv-v.cc (emit_vec_widden_cvt_x_f): widden -> widen.
	(emit_vec_widen_cvt_x_f): Ditto.
	(emit_vec_widden_cvt_f_f): Ditto.
	(emit_vec_widen_cvt_f_f): Ditto.
	(emit_vec_rounding_to_integer): Update *widden* callsites.
	* config/riscv/riscv-vector-builtins.cc (expand_builtin): Update
	required_ext_to_isa_name callsite and fix xtheadvector typo.
	* config/riscv/riscv-vector-builtins.h (reqired_ext_to_isa_name): Rename...
	(required_ext_to_isa_name): here.
	* config/riscv/riscv_th_vector.h: Fix endif label.
	* config/riscv/vector-crypto.md: boardcast_scalar -> broadcast_scalar.
	* config/riscv/vector.md: Ditto.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

This fixes most of the typos I found when reading various parts of the RISC-V
backend.

gcc/ChangeLog:

	* config/riscv/arch-canonicalize: Fix typos in comments.
	* config/riscv/autovec.md: Ditto.
	* config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Ditto.
	(pass_avlprop::get_vlmax_ta_preferred_avl): Ditto.
	* config/riscv/riscv-modes.def (ADJUST_FLOAT_FORMAT): Ditto.
	(VLS_MODES): Ditto.
	* config/riscv/riscv-opts.h (TARGET_ZICOND_LIKE): Ditto.
	(enum rvv_vector_bits_enum): Ditto.
	* config/riscv/riscv-protos.h (enum insn_flags): Ditto.
	(enum insn_type): Ditto.
	* config/riscv/riscv-sr.cc (riscv_sr_match_epilogue): Ditto.
	* config/riscv/riscv-string.cc (expand_block_move): Ditto.
	* config/riscv/riscv-v.cc (rvv_builder::is_repeating_sequence): Ditto.
	(rvv_builder::single_step_npatterns_p): Ditto.
	(calculate_ratio): Ditto.
	(expand_const_vector): Ditto.
	(shuffle_merge_patterns): Ditto.
	(shuffle_compress_patterns): Ditto.
	(expand_select_vl): Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins.cc (function_builder::add_function): Ditto.
	(resolve_overloaded_builtin): Ditto.
	* config/riscv/riscv-vector-builtins.def (vbool1_t): Ditto.
	(vuint8m8_t): Ditto.
	(vuint16m8_t): Ditto.
	(vfloat16m8_t): Ditto.
	(unsigned_vector): Ditto.
	* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
	* config/riscv/riscv-vector-costs.cc (get_store_value): Ditto.
	(costs::analyze_loop_vinfo): Ditto.
	(costs::add_stmt_cost): Ditto.
	* config/riscv/riscv.cc (riscv_build_integer): Ditto.
	(riscv_vector_type_p): Ditto.
	* config/riscv/thead.cc (th_mempair_output_move): Ditto.
	* config/riscv/thead.md: Ditto.
	* config/riscv/vector-iterators.md: Ditto.
	* config/riscv/vector.md: Ditto.
	* config/riscv/zc.md: Ditto.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

Patrick noticed a few more concept_check_p checks that can be removed
now.

gcc/cp/ChangeLog:

	* constexpr.cc (cxx_eval_call_expression): Remove concept_check_p check.
	(cxx_eval_outermost_constant_expr): Likewise.
	* cp-gimplify.cc (cp_genericize_r) <case CALL_EXPR>: Likewise.
	* except.cc (check_noexcept_r): Likewise.

Building on the last patch, deduction should probably look through all
IMPLICIT_CONV_EXPR like we do other conversions.

One resulting regression turned out to be due to PR94568, fixed separately.

The one other regression was for a seeming mismatch between a function and
its address, handled here.  Before this change we treated the
IMPLICIT_CONV_EXPR as dependent because the template parameter has dependent
type.

	PR c++/116223

gcc/cp/ChangeLog:

	* pt.cc (deducible_expression): Strip all IMPLICIT_CONV_EXPR.
	(unify): Likewise.  Handle resulting function/addr mismatch.

My r14-8291 for PR112632 introduced IMPLICIT_CONV_EXPR_FORCED to express
conversions to the type of an alias template parameter.  In this example,
that broke deduction of X in the call to foo, so let's teach deduction to
look through it.

	PR c++/116223
	PR c++/112632

gcc/cp/ChangeLog:

	* pt.cc (deducible_expression): Also look through
	IMPLICIT_CONV_EXPR_FORCED.
	(unify): Likewise.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp1z/nontype-auto25.C: New test.

A zero-initializer should not reflect the constness of what it's
initializing, as it does not for initializers with different syntax.

This does have mangling implications for rare C++20 code, but it seems
infeasable to make the mangling depend on -fabi-version while fixing the
semantic bug, and C++20 is still experimental anyway.

	PR c++/94568

gcc/cp/ChangeLog:

	* init.cc (build_zero_init_1): Call cv_unqualified.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/nontype-class36.C: Remove xfail.
	* g++.dg/cpp2a/nontype-class37.C: Remove xfail.
	* g++.dg/cpp1z/nontype-auto26.C: New test.

This patch refactors ashrv2di RTL expansion into a function so that it may
be reused by a pre-reload splitter, such that DImode right shifts may be
considered candidates during the Scalar-To-Vector (STV) pass.  Currently
DImode arithmetic right shifts are not considered potential candidates
during STV, so for the following testcase:

long long m;
typedef long long v2di __attribute__((vector_size (16)));
void foo(v2di x) { m = x[0]>>63; }

We currently see the following warning/error during STV2
>  r101 use in insn 7 isn't convertible

And end up generating scalar code with an interunit move:

foo:	movq    %xmm0, %rax
        sarq    $63, %rax
        movq    %rax, m(%rip)
        ret

With this patch, we can reuse the RTL expansion logic and produce:

foo:	psrad   $31, %xmm0
        pshufd  $245, %xmm0, %xmm0
        movq    %xmm0, m(%rip)
        ret

Or with the addition of -mavx2, the equivalent:

foo:    vpxor   %xmm1, %xmm1, %xmm1
        vpcmpgtq        %xmm0, %xmm1, %xmm0
        vmovq   %xmm0, m(%rip)
        ret

The only design decision of note is the choice to continue lowering V2DI
into vector sequences during RTL expansion, to enable combine to optimize
things if possible.  Using just define_insn_and_split potentially misses
optimizations, such as reusing the zero vector produced by vpxor above.
It may be necessary to tweak STV's compute gain at some point, but this
patch controls what's possible (rather than what's beneficial).

2024-08-06  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* config/i386/i386-expand.cc (ix86_expand_v2di_ashiftrt): New
	function refactored from define_expand ashrv2di3.
	* config/i386/i386-features.cc (general_scalar_to_vector_candidate_p)
	<case ASHIFTRT>: Handle like other shifts and rotates.
	* config/i386/i386-protos.h (ix86_expand_v2di_ashiftrt): Prototype.
	* config/i386/sse.md (ashrv2di3): Call ix86_expand_v2di_ashiftrt.
	(*ashrv2di3): New define_insn_and_split to enable creation by stv2
	pass, and splitting during split1 reusing ix86_expand_v2di_ashiftrt.

gcc/testsuite/ChangeLog
	* gcc.target/i386/sse2-stv-2.c: New test case.

gcc/ChangeLog:

	PR target/116152
	* config/riscv/riscv.cc (riscv_option_override): Fix url
	formatting.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/predef-9.c: Update testcase.

Co-authored-by: Jakub Jelinek <jakub@redhat.com>
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>

This extends our folding of cast-like standard library functions
to also include C++23's std::forward_like.

	PR c++/96780

gcc/cp/ChangeLog:

	* cp-gimplify.cc (cp_fold) <case CALL_EXPR>: Fold calls
	to std::forward_like as well.

gcc/testsuite/ChangeLog:

	* g++.dg/opt/pr96780.C: Also test std::forward_like folding.

Reviewed-by: Marek Polacek <mpolacek@redhat.com>
Reviewed-by: Jason Merrill <jason@redhat.com>

Currently the main logic of the sccopy pass is implemented as static
functions.  This patch instead puts the code into a class.  This also
gets rid of a global variable (dead_stmts).

gcc/ChangeLog:

	* gimple-ssa-sccopy.cc (class scc_copy_prop): New class.
	(replace_scc_by_value): Put into...
	(scc_copy_prop::replace_scc_by_value): ...scc_copy_prop.
	(sccopy_visit_op): Put into...
	(scc_copy_prop::visit_op): ...scc_copy_prop.
	(sccopy_propagate): Put into...
	(scc_copy_prop::propagate): ...scc_copy_prop.
	(init_sccopy): Replace by...
	(scc_copy_prop::scc_copy_prop): ...the construtor.
	(finalize_sccopy): Replace by...
	(scc_copy_prop::~scc_copy_prop): ...the destructor.
	(pass_sccopy::execute): Use scc_copy_prop.

Signed-off-by: Filip Kastl <fkastl@suse.cz>

When there's a conversion in front of a SLP condition reduction the
code following the reduc-idx SLP chain fails because it assumes
there's only COND_EXPRs.

	PR tree-optimization/116241
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Handle
	non-COND_EXPR nodes in SLP reduction chain following.

	* g++.dg/vect/pr116241.cc: New testcase.

The test FAILs on big endian targets, because VV is a vector of unsigned __int128
and VC vector of unsigned char and so ((VC) vv)[0] is 0x01 on little endian
but 0xff on big endian and PDP endian.
As I believe it is intentional to test it as it is written on little endian,
the following patch just adds another case for big endian and for other
endians instead of figuring out what exactly to fetch it fetches the whole
unsigned __int128 and casts it to unsigned char.  Not that pdp11 has
__int128 support...

2024-08-06  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/116037
	PR testsuite/116245
	* gcc.dg/torture/pr116037.c (foo): Fix up for big end middle endian.

The following testcase is miscompiled, because wi::mul for (_BitInt(65))-15
times (_BitInt(65))-15 computes the right value (_BitInt(65))225, but
sets *overflow to wi::OVF_UNKNOWN as that it overflowed when it didn't.

Even signed operands are unpacked as unsigned but because they are
implicitly sign-extended from the represented value (the operands
obviously have len==1), we get
0xfffffff1, 0xffffffff, 0x1, 0x0
in both u and v (0x1 because that is exactly 65 bits).
We then multiply these.  Next step is because both the high and
overflow handling expects the high half to start at a limb boundary
the bits of the result starting with bit 65 are shifted up by 63 such
that the bits relevant for high/need_overflow start at the half of the
4th half wide int limb.
Because both operands are negative that part is then adjusted.

The reason mul_internal says there is overflow is because of the unspecified
garbage in the most significant bits of the result which the adjusting
doesn't clean up.  65 bit multiplication needs 65 bits of result and 65 bits
of the high part, can't produce more, so the following patch fixes it by
checking for the overflow only in those first 65 bits of the high part, not
anything beyond that.  If it was a highpart multiply, we'd have ignored that
as well (canonicalized).

2024-08-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/116224
	* wide-int.cc (wi::mul_internal): If prec isn't multiple of
	HOST_BITS_PER_WIDE_INT, for need_overflow checking only look at
	the least significant prec bits starting with r[half_blocks_needed].

	* gcc.dg/torture/bitint-72.c: New test.

Wrong interpretation of the type of the concatenation can lead to a
spurious error in GNATprove when inlining code. Now fixed.

gcc/ada/

	* sem_ch4.adb (Analyze_Concatenation_Rest): Do not add a wrong
	interpretation of the concatenation, using the type of the operand
	already recognized as of the element type.

...based on previous work that added Gen_Assocs_Rec.
Minor cleanup of that previous work.

gcc/ada/

	* sem_ch12.adb: Implement type inference for generic parameters.
	(Maybe_Infer_One): Forbid inference of anonymous subtypes and
	types.
	(Inference_Reason): Fix comment.
	* debug.adb: Document -gnatd_I switch.
	* errout.ads: Document that Empty is not allowed for "&".
	* errout.adb (Set_Msg_Insertion_Node): Minor: Do not allow
	Error_Msg_Node_1 = Empty for "&". Use "in" instead of multiple
	"=". Improve comment.

Recent fixes for container aggregates with iterated element associations
exposed a latent bug with loops that are wrapped in blocks, where the loop
entity's scope was not adjusted to reflect the new enclosing block scope.

gcc/ada/

	* sem_ch5.adb (Analyze_Loop_Statement.Wrap_Loop_Statement): Remove
	the loop Entity_Id from its old scope and insert it in the new
	block scope that wraps it.

When the aspect Default_Value is inherited by a derived scalar
type, and both the parent type T and the derived type DT are
declared in the same scope, a spurious error may be reported.
This occurs if a subprogram declared in the same scope has a
parameter of type DT with a default value, leading the compiler
to incorrectly flag the default value specified in the aspect
of type T as having the wrong type.

gcc/ada/

	* freeze.adb (Freeze_Entity): For scalar derived types that
	inherit the aspect Default_Value, do not analyze and resolve the
	inherited aspect, as the type of the aspect remains the parent
	type.

gcc/ada/

	* libgnarl/s-interr__hwint.adb: Use fully qualified names to avoid
	ambiguity.
	* libgnarl/s-taprop__qnx.adb: Likewise.

Using switch gnatR4, the frontend crashes when generating information
for a private record type.

gcc/ada/

	* repinfo.adb (List_Record_Info): Handle private record types.