ROCm since 5.7.1 supports gfx1100 (RDNA3) cards. This commit adds support
for it, mostly by assuming gfx1100 behaves identical to gfx1030.  Like gfx1030,
gfx1100 support is neither documented nor the build of the multilib enabled by
default.

But contrary to gfx1030, gfx1100 has a known issue causing some libraries not
to build, including newlib: The sdwa variant of v_mov_b32_sdwa is not supported
by the hardware but GCC current does generates this instruction.
This will be addressed in a later commit.

gcc/ChangeLog:

	* config.gcc (amdgcn-*-amdhsa): Accept --with-arch=gfx1100.
	* config/gcn/gcn-hsa.h (NO_XNACK): Add gfx1100:
	(ASM_SPEC): Handle gfx1100.
	* config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1100.
	(enum gcn_isa): Add ISA_RDNA3.
	(TARGET_GFX1100, TARGET_RDNA2_PLUS, TARGET_RDNA3): Define.
	* config/gcn/gcn-valu.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
	* config/gcn/gcn.cc (gcn_option_override,
	gcn_omp_device_kind_arch_isa, output_file_start): Handle gfx1100.
	(gcn_global_address_p, gcn_addr_space_legitimate_address_p): Change
	TARGET_RDNA2 to TARGET_RDNA2_PLUS.
	(gcn_hsa_declare_function_name): Don't use '.amdhsa_reserve_flat_scratch'
	with gfx1100.
	* config/gcn/gcn.h (ASSEMBLER_DIALECT): Likewise.
	(TARGET_CPU_CPP_BUILTINS): Define __RDNA3__, __gfx1030__ and
	__gfx1100__.
	* config/gcn/gcn.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
	* config/gcn/gcn.opt (Enum gpu_type): Add gfx1100.
	* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1100): Define.
	(isa_has_combined_avgprs, main): Handle gfx1100.
	* config/gcn/t-omp-device (isa): Add gfx1100.

libgomp/ChangeLog:

	* plugin/plugin-gcn.c (gcn_gfx1100_s): New const string.
	(gcn_isa_name_len): Fix length.
	(isa_hsa_name, isa_code, max_isa_vgprs): Handle gfx1100.

It was noticed that -mmovbe doesn't use movbe for __builtin_bswap{32,64}
when not optimizing.  The follownig adjusts the documentation to
say it will be used for optimizing and applies to all byte swaps,
not just those carried out via builtin function calls.

	* doc/invoke.texi (-mmovbe): Clarify.

The following avoids creating a niter peeling epilog more consistently,
matching what peeling later uses for the skip_vector condition, in
particular when versioning is required which then also ensures the
vector loop is entered unless the epilog is vectorized.  This should
ideally match LOOP_VINFO_VERSIONING_THRESHOLD which is only computed
later, some refactoring could make that better matching.

The patch also makes sure to adjust the upper bound of the epilogues
when we do not have a skip edge around the vector loop.

	PR tree-optimization/113026
	* tree-vect-loop.cc (vect_need_peeling_or_partial_vectors_p):
	Avoid an epilog in more cases.
	* tree-vect-loop-manip.cc (vect_do_peeling): Adjust the
	epilogues niter upper bounds and estimates.

	* gcc.dg/torture/pr113026-1.c: New testcase.
	* gcc.dg/torture/pr113026-2.c: Likewise.

The following testcase ICEs during regimplificatgion since the addition of
(convert (eqne zero_one_valued_p@0 INTEGER_CST@1))
simplification.  That simplification is novel in the sense that in
gimplify_expr it can turn an expression (comparison in particular) into
a SSA_NAME.  Normally when gimplify_expr sees originally a SSA_NAME, it does
        case SSA_NAME:
          /* Allow callbacks into the gimplifier during optimization.  */
          ret = GS_ALL_DONE;
          break;
and doesn't try to recalculate side effects because of that, but in this
case gimplify_expr normally enters the:
        default:
          switch (TREE_CODE_CLASS (TREE_CODE (*expr_p)))
            {
            case tcc_comparison:
then does
                      *expr_p = gimple_boolify (*expr_p);
and then
                          *expr_p = fold_convert_loc (input_location,
                                                      org_type, *expr_p);
with this new match.pd simplification turns that tcc_comparison class
into SSA_NAME.  Unlike the outer SSA_NAME handling though, this falls
through into
          recalculate_side_effects (*expr_p);

        dont_recalculate:
          break;
but unfortunately recalculate_side_effects doesn't handle SSA_NAME and ICEs
on it.
SSA_NAMEs don't ever have TREE_SIDE_EFFECTS set on those, so the following
patch fixes it by handling it similarly to the tcc_constant case.

2024-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113228
	* gimplify.cc (recalculate_side_effects): Do nothing for SSA_NAMEs.

	* gcc.c-torture/compile/pr113228.c: New test.

The PHI argument expansion of INTEGER_CSTs where bitint_min_cst_precision
returns significantly smaller precision than the PHI result precision is
optimized by loading the much smaller constant (if any) from memory and
then either setting the remaining limbs to {} or calling memset with -1.
The case where no constant is loaded (i.e. c == NULL) is when the
INTEGER_CST is 0 or all_ones - in that case we can just set all the limbs
to {} or call memset with -1 on everything.
While for the all ones extension case that is what the code was already
doing, I missed one spot in the zero extension case, where constricting
the offset of the MEM_REF lhs of the = {} store it was using unconditionally
the byte size of c, which obviously doesn't work if c is NULL.  In that case
we want to use zero offset.

2024-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113120
	* gimple-lower-bitint.cc (gimple_lower_bitint): Fix handling of very
	large _BitInt zero INTEGER_CST PHI argument.

	* gcc.dg/bitint-62.c: New test.

lower-bitint: Punt .*_OVERFLOW optimization if cast from IMAGPART_EXPR appears before REALPART_EXPR [PR113119]

_BitInt lowering for .{ADD,SUB,MUL}_OVERFLOW calls which have both
REALPART_EXPR and IMAGPART_EXPR used and have a cast from the IMAGPART_EXPR
to a boolean or normal integral type lowers them at the point of
the REALPART_EXPR statement (which is especially needed if the lhs of
the call is complex with large/huge _BitInt element type); we emit the
stmt to set the lhs of the cast at the same spot as well.
Normally, the lowering of __builtin_{add,sub,mul}_overflow arranges
the REALPART_EXPR to come before IMAGPART_EXPR, followed by cast from that,
but as the testcase shows, a redundant __builtin_*_overflow call and VN
can reorder those and we then ICE because the def-stmt of the former cast
from IMAGPART_EXPR may appear after its uses.
We already check that all of REALPART_EXPR, IMAGPART_EXPR and the cast
from the latter appear in the same bb as the .{ADD,SUB,MUL}_OVERFLOW call
in the optimization, the following patch just extends it to make sure
cast appears after REALPART_EXPR; if not, we punt on the optimization and
expand it as a store of a complex _BitInt on the location of the ifn call.
Only the testcase in the testsuite is changed by the patch, all other
__builtin_*_overflow* calls in the bitint* tests (and there are quite a few)
have REALPART_EXPR first.

2024-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113119
	* gimple-lower-bitint.cc (optimizable_arith_overflow): Punt if
	both REALPART_EXPR and cast from IMAGPART_EXPR appear, but cast
	is before REALPART_EXPR.

	* gcc.dg/bitint-61.c: New test.

so they work with all combinations of -f[no-]data-sections -f[no-]common.
The patch also improves some diagnostics and adds additional checks, for
example these attributes must only be applied to variables in static storage.

gcc/
	PR target/112952
	* config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
	range when diagnosing attribute "io" and "io_low" are out of range.
	(avr_eval_addr_attrib): Don't ICE on empty address at that place.
	(avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
	in contexts other than static storage.
	(avr_asm_output_aligned_decl_common): Move output of decls with
	attribute "address", "io", and "io_low" to...
	(avr_output_addr_attrib): ...this new function.
	(avr_asm_asm_output_aligned_bss): Remove output for decls with
	attribute "address", "io", and "io_low".
	(avr_encode_section_info): Rectify handling of decls with attribute
	"address", "io", and "io_low".

gcc/testsuite/
	PR target/112952
	* gcc.target/avr/attribute-io.h: New file.
	* gcc.target/avr/pr112952-0.c: New test.
	* gcc.target/avr/pr112952-1.c: New test.
	* gcc.target/avr/pr112952-2.c: New test.
	* gcc.target/avr/pr112952-3.c: New test.

..., but not for host builds, which don't need it, and it may cause the build
to fail.

Use what appears to be the standard pattern for that (see
'libbacktrace/configure.ac', 'zlib/configure.ac').

	PR rust/113056
	libgrust/
	* configure.ac: 'AM_ENABLE_MULTILIB' only for target builds.
	* configure: Regenerate.

The patch that disabled XNACK by default for ISA other than gfx90a was missing
the matching mkoffload changes.  This patch should fix offload.

gcc/ChangeLog:

	* config/gcn/mkoffload.cc (TEST_XNACK_UNSET): New.
	(elf_flags): Remove XNACK from the default value.
	(main): Set a default XNACK according to the arch.

CDNA2 devices have VGPRs and AVGPRs combined into a single hardware register
file (they're seperate in CDNA1).  I originally thought they were counted
separately in the vgpr_count and agpr_count metadata fields, and therefore
mkoffload had to account for this when passing the values to libgomp.  However,
that wasn't the case, and this code should have been removed when I corrected
the calculations in gcn.cc.  Fixing the error now.

gcc/ChangeLog:

	* config/gcn/mkoffload.cc (isa_has_combined_avgprs): Delete.
	(process_asm): Don't count avgprs.

Don't use assert, it not work well with multilib testing.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/partial/single_rgroup-3.h: Use
	check + abort rather than assert.

The supported sub-features for APX was missing in option document and
target attribute section. Add those missing ones.

gcc/ChangeLog:

	* config/i386/i386.opt: Add supported sub-features.
	* doc/extend.texi: Add description for target attribute.

This adds std::runtime_format for C++26. These new overloaded functions
enhance the std::format API so that it isn't necessary to use the less
ergonomic std::vformat and std::make_format_args (which are meant to be
implementation details). This was approved in Kona 2023 for C++26.

libstdc++-v3/ChangeLog:

	* include/std/format (__format::_Runtime_format_string): Define
	new class template.
	(basic_format_string): Add non-consteval constructor for runtime
	format strings.
	(runtime_format): Define new function for C++26.
	* testsuite/std/format/runtime_format.cc: New test.

This change makes std::make_format_args refuse to create dangling
references to temporaries. This makes the std::vformat API safer. This
was approved in Kona 2023 as a DR for C++20 so the change is implemented
unconditionally.

libstdc++-v3/ChangeLog:

	* include/bits/chrono_io.h (__formatter_chrono): Always use
	lvalue arguments to make_format_args.
	* include/std/format (make_format_args): Change parameter pack
	from forwarding references to lvalue references. Remove use of
	remove_reference_t which is now unnecessary.
	(format_to, formatted_size): Remove incorrect forwarding of
	arguments.
	* include/std/ostream (print): Remove forwarding of arguments.
	* include/std/print (print): Likewise.
	* testsuite/20_util/duration/io.cc: Use lvalues as arguments to
	make_format_args.
	* testsuite/std/format/arguments/args.cc: Likewise.
	* testsuite/std/format/arguments/lwg3810.cc: Likewise.
	* testsuite/std/format/functions/format.cc: Likewise.
	* testsuite/std/format/functions/vformat_to.cc: Likewise.
	* testsuite/std/format/string.cc: Likewise.
	* testsuite/std/time/day/io.cc: Likewise.
	* testsuite/std/time/month/io.cc: Likewise.
	* testsuite/std/time/weekday/io.cc: Likewise.
	* testsuite/std/time/year/io.cc: Likewise.
	* testsuite/std/time/year_month_day/io.cc: Likewise.
	* testsuite/std/format/arguments/args_neg.cc: New test.

This implements the requirements in the following proposals, which
dictate how std::format deals with non-ASCII strings:
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1868r1.html
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p2572r1.html
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p2675r1.pdf

There are two parts to this. The width estimation for strings must only
count the width of the first character in an extended grapheme cluster.
That requires implementing the algorithm for detecting cluster breaks,
which requires a number of lookup tables of the grapheme cluster break
properties (and Indic_Conjunct_Break and Extended_Pictographic
properties) of every code point. Additionally, some characters have a
field width of 2, which requires another lookup table of field widths
for every code point.  The tables added in this commit do not contain
entries for every code point from 0 to 0x10FFFF as that would be very
inefficient and use too much memory. Instead the tables only contain the
code points that form an "edge" for a property, omitting all the code
points that have the same property as the preceding one. We can use a
binary search to find the closest code point in the table that is not
greater than the one we're looking for.

The tables are generated by a new Python script added to the
contrib/unicode directory, and a new data file downloaded from the
Unicode Consortium website.

The rules for extended grapheme cluster breaking are implemented for the
latest Unicode standard, version 15.1.0.

libstdc++-v3/ChangeLog:

	* include/Makefile.am: Add new headers.
	* include/Makefile.in: Regenerate.
	* include/bits/unicode.h: New file.
	* include/bits/unicode-data.h: New file.
	* include/std/format: Include <bits/unicode.h>.
	(__literal_encoding_is_utf8): Move to <bits/unicode.h>.
	(_Spec::_M_fill): Change type to char32_t.
	(_Spec::_M_parse_fill_and_align): Read a Unicode scalar value
	instead of a single character.
	(__write_padded): Change __fill_char parameter to char32_t and
	encode it into the output.
	(__formatter_str::format): Use new __unicode::__field_width and
	__unicode::__truncate functions.
	* include/std/ostream: Adjust namespace qualification for
	__literal_encoding_is_utf8.
	* include/std/print: Likewise.
	* src/c++23/print.cc: Add [[unlikely]] attribute to error path.
	* testsuite/ext/unicode/view.cc: New test.
	* testsuite/std/format/functions/format.cc: Add missing examples
	from the standard demonstrating alignment with non-ASCII
	characters. Add examples checking correct handling of extended
	grapheme clusters.

contrib/ChangeLog:

	* unicode/README: Add notes about generating libstdc++ tables.
	* unicode/GraphemeBreakProperty.txt: New file.
	* unicode/emoji-data.txt: New file.
	* unicode/gen_libstdcxx_unicode_data.py: New file.

This change ensures that char and wchar_t arguments are formatted
consistently when using integer presentation types. This avoids
non-portable std::format output that depends on whether char and wchar_t
happen to be signed or unsigned on the target. Formatting '\xff' as an
integer will now always format 255 and not sometimes -1. This was
approved in Kona 2023 as a DR for C++20 so the change is implemented
unconditionally.

Also make character formatters check for _Pres_c explicitly and call
_M_format_character directly. This avoid the overhead of calling format
and _S_to_character and then calling _M_format_character anyway.

libstdc++-v3/ChangeLog:

	* include/bits/version.def (format_uchar): Define.
	* include/bits/version.h: Regenerate.
	* include/std/format (formatter<C, C>::format): Check for
	_Pres_c and call _M_format_character directly. Cast C to its
	unsigned equivalent for formatting as an integer.
	(formatter<char, wchar_t>::format): Likewise.
	(basic_format_arg(T&)): Store char arguments as unsigned char
	for formatting to a wide string.
	* testsuite/std/format/functions/format.cc: Adjust test. Check
	formatting of

This patch fix the rtl-checking error for crypto vector. The root
cause is the avl-type index of zvbc ins is error,it should be operand[8]
not operand[5].
gcc/ChangeLog:

	* config/riscv/vector.md: Modify avl_type operand index of zvbc ins.

gcc/testsuite/
	* gcc.target/avr/lra-cpymem_qi.c: Remove duplicate -mmcu=.
	* gcc.target/avr/lra-elim.c: Same.
	* gcc.target/avr/pr112830.c: Skip for Reduced Tiny.
	* gcc.target/avr/pr46779-1.c: Same.
	* gcc.target/avr/pr46779-2.c: Same.
	* gcc.target/avr/pr86869.c: Skip for Reduced Tiny and add -std=gnu99
	for GNU-C due to address spaces.
	* gcc.target/avr/pr89270.c: Same.
	* gcc.target/avr/torture/builtins-2-flash.c: Only test address
	space __flash1 if we have it.
	* gcc.target/avr/torture/addr-space-1-1.c: Same.
	* gcc.target/avr/torture/addr-space-2-1.c: Same.

PR libgfortran/113223

libgfortran/ChangeLog:

	* io/write.c (namelist_write): If internal_unit precede with space.

gcc/testsuite/ChangeLog:

	* gfortran.dg/dtio_25.f90: Update.
	* gfortran.dg/namelist_57.f90: Update.
	* gfortran.dg/namelist_65.f90: Update.

This patch improves the cost/gain calculation used during the i386 backend's
SImode/DImode scalar-to-vector (STV) conversion pass.  The current code
handles loads and stores, but doesn't consider that converting other
scalar operations with a memory destination, requires an explicit load
before and an explicit store after the vector equivalent.

To ease the review, the significant change looks like:

         /* For operations on memory operands, include the overhead
            of explicit load and store instructions.  */
         if (MEM_P (dst))
           igain += !optimize_insn_for_size_p ()
                    ? -COSTS_N_BYTES (8);
                    : (m * (ix86_cost->int_load[2]
                            + ix86_cost->int_store[2])
                       - (ix86_cost->sse_load[sse_cost_idx] +
                          ix86_cost->sse_store[sse_cost_idx]));

however the patch itself is complicated by a change in indentation
which leads to a number of lines with only whitespace changes.
For architectures where integer load/store costs are the same as
vector load/store costs, there should be no change without -Os/-Oz.

2024-01-07  Roger Sayle  <roger@nextmovesoftware.com>
	    Uros Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog
	PR target/113231
	* config/i386/i386-features.cc (compute_convert_gain): Include
	the overhead of explicit load and store (movd) instructions when
	converting non-store scalar operations with memory destinations.
	Various indentation whitespace fixes.

gcc/testsuite/ChangeLog
	PR target/113231
	* gcc.target/i386/pr113231.c: New test case.

This adds an implementation for conditional branch optab for AArch32.

For e.g.

void f1 ()
{
  for (int i = 0; i < N; i++)
    {
      b[i] += a[i];
      if (a[i] > 0)
	break;
    }
}

For 128-bit vectors we generate:

        vcgt.s32        q8, q9, #0
        vpmax.u32       d7, d16, d17
        vpmax.u32       d7, d7, d7
        vmov    r3, s14 @ int
        cmp     r3, #0

and of 64-bit vector we can omit one vpmax as we still need to compress to
32-bits.

gcc/ChangeLog:

	* config/arm/neon.md (cbranch<mode>4): New.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/vect-early-break_2.c: Skip Arm.
	* gcc.dg/vect/vect-early-break_7.c: Likewise.
	* gcc.dg/vect/vect-early-break_75.c: Likewise.
	* gcc.dg/vect/vect-early-break_77.c: Likewise.
	* gcc.dg/vect/vect-early-break_82.c: Likewise.
	* gcc.dg/vect/vect-early-break_88.c: Likewise.
	* lib/target-supports.exp (add_options_for_vect_early_break,
	check_effective_target_vect_early_break_hw,
	check_effective_target_vect_early_break): Support AArch32.
	* gcc.target/arm/vect-early-break-cbranch.c: New test.

gcc/testsuite
	* gcc.dg/tree-ssa/phi-opt-25b.c: Remove extraneous "short".

gcc/testsuite/
	PR testsuite/52641
	* gcc.dg/torture/pr110838.c: Use proper shift offset to get MSB or int.
	* gcc.dg/torture/pr112282.c: Use at least 32 bits for :20 bit-fields.
	* gcc.dg/tree-ssa/bitcmp-5.c: Use integral type with 32 bits or more.
	* gcc.dg/tree-ssa/bitcmp-6.c: Same.
	* gcc.dg/tree-ssa/cltz-complement-max.c: Same.
	* gcc.dg/tree-ssa/cltz-max.c: Same.
	* gcc.dg/tree-ssa/if-to-switch-8.c: Use literals that fit int.
	* gcc.dg/tree-ssa/if-to-switch-9.c [avr]: Set case-values-threshold=3.
	* gcc.dg/tree-ssa/negneg-3.c: Discriminate [not] large_double.
	* gcc.dg/tree-ssa/phi-opt-25b.c: Use types of correct widths for
	__builtin_bswapN.
	* gcc.dg/tree-ssa/pr55177-1.c: Same.
	* gcc.dg/tree-ssa/popcount-max.c: Use int32_t where required.
	* gcc.dg/tree-ssa/pr111583-1.c: Use intptr_t as needed.
	* gcc.dg/tree-ssa/pr111583-2.c: Same.

gcc/testsuite/
	PR testsuite/52641
	* gcc.dg/memchr-3.c [avr]: Anticipate -Wbuiltin-declaration-mismatch.
	* gcc.dg/pr103207.c: Use __INT32_TYPE__ instead of int.
	* gcc.dg/pr103451.c [void* != long]: Anticipate -Wpointer-to-int-cast.
	* gcc.dg/pr110496.c [void* != long]: Anticipate -Wint-to-pointer-cast.
	* gcc.dg/pr109977.c: Use __SIZEOF_DOUBLE__ instead of 8.
	* gcc.dg/pr110506-2.c: Use __UINT32_TYPE__ for uint32_t.
	* gcc.dg/pr110582.c: Require int32plus.
	* gcc.dg/pr111039.c: [sizeof(int) < 4]: Use __INT32_TYPE__.
	* gcc.dg/pr111599.c: Same.
	* gcc.dg/builtin-dynamic-object-size-0.c: Require size20plus.
	* gcc.dg/builtin-object-size-1.c [avr]: Skip tests with strndup.
	* gcc.dg/builtin-object-size-2.c: Same.
	* gcc.dg/builtin-object-size-3.c: Same.
	* gcc.dg/builtin-object-size-4.c: Same.
	* gcc.dg/pr111070.c: Use __UINTPTR_TYPE__ instead of unsigned long.
	* gcc.dg/debug/btf/btf-pr106773.c: Same.
	* gcc.dg/debug/btf/btf-bitfields-2.c: [sizeof(int) < 4]: Use
	__UINT32_TYPE__.

gcc/testsuite/
	PR testsuite/52641
	* gcc.c-torture/compile/attr-complex-method-2.c [target=avr]: Check
	for "divsc3" as double = float per default.
	* gcc.c-torture/compile/pr106537-1.c: Use __INTPTR_TYPE__ instead of
	hard-coded "long".
	* gcc.c-torture/compile/pr106537-2.c: Same.
	* gcc.c-torture/compile/pr106537-3.c: Same.
	* gcc.c-torture/execute/20230630-3.c: Use __INT32_TYPE__ for bit-field
	wider than 16 bits.
	* gcc.c-torture/execute/20230630-4.c: Same.
	* gcc.c-torture/execute/pr109938.c: Require int32plus.
	* gcc.c-torture/execute/pr109986.c: Same.
	* gcc.dg/fold-ior-4.c: Same.
	* gcc.dg/fold-ior-5.c: Same
	* gcc.dg/fold-parity-5.c: Same.
	* gcc.dg/fold-popcount-5.c: Same.
	* gcc.dg/builtin-bswap-13.c [sizeof(int) < 4]: Use __INT32_TYPE__
	instead of int.
	* gcc.dg/builtin-bswap-14.c: Use __INT32_TYPE__ instead of int where
	required by code.
	* gcc.dg/c23-constexpr-9.c: Require large_double.
	* gcc.dg/c23-nullptr-1.c [target=avr]: xfail.
	* gcc.dg/loop-unswitch-10.c: Require size32plus.
	* gcc.dg/loop-unswitch-14.c: Same.
	* gcc.dg/loop-unswitch-11.c: Require int32.
	* gcc.dg/pr101836.c: Use __SIZEOF_INT instead of hard-coded 4.
	* gcc.dg/pr101836_1.c: Same.
	* gcc.dg/pr101836_2.c: Same.
	* gcc.dg/pr101836_3.c: Same.

The attached testcase Patrick found in PR c++/112899 ICEs because it is
attempting to write a variable initializer that is no longer in the
static_aggregates map.

The issue is that, for non-header modules, the loop in
c_parse_final_cleanups prunes the static_aggregates list, which means
that by the time we get to emitting module information those
initialisers have been lost.

However, we don't actually need to write non-trivial initialisers for
non-header modules, because they've already been emitted as part of the
module TU itself.  Instead let's just only write the initializers from
header modules (which skipped writing them in c_parse_final_cleanups).

gcc/cp/ChangeLog:

	* module.cc (trees_out::write_var_def): Only write initializers
	in header modules.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/init-5_a.C: New test.
	* g++.dg/modules/init-5_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

This patch stops 'add_binding_entity' from ignoring all names in the
global module fragment, since they should still be exported if named
in an exported using-declaration.

	PR c++/109679

gcc/cp/ChangeLog:

	* module.cc (depset::hash::add_binding_entity): Don't skip names
	in the GMF if they've been exported with a using declaration.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/using-11.h: New test.
	* g++.dg/modules/using-11_a.C: New test.
	* g++.dg/modules/using-11_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

This patch cleans up the parsing of module-declarations and
import-declarations to more closely follow the grammar defined by the
standard.

For instance, currently we allow declarations like 'import A:B', even
from an unrelated source file (not part of module A), which causes
errors in merging declarations. However, the syntax in [module.import]
doesn't even allow this form of import, so this patch prevents this from
parsing at all and avoids the error that way.

Additionally, we sometimes allow statements like 'import :X' or
'module :X' even when not in a named module, and this causes segfaults,
so we disallow this too.

	PR c++/110808

gcc/cp/ChangeLog:

	* parser.cc (cp_parser_module_name): Rewrite to handle
	module-names and module-partitions independently.
	(cp_parser_module_partition): New function.
	(cp_parser_module_declaration): Parse module partitions
	explicitly. Don't change state if parsing module decl failed.
	(cp_parser_import_declaration): Handle different kinds of
	import-declarations locally.

gcc/testsuite/ChangeLog:

	* g++.dg/modules/part-hdr-1_c.C: Fix syntax.
	* g++.dg/modules/part-mac-1_c.C: Likewise.
	* g++.dg/modules/mod-invalid-1.C: New test.
	* g++.dg/modules/part-8_a.C: New test.
	* g++.dg/modules/part-8_b.C: New test.
	* g++.dg/modules/part-8_c.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>

Obvious fix, Committed.

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc: replace std::max by MAX.

r14-1527-g2415024e0f81f8 changed the parameter of the
__cxa_call_terminate definition, but there's also a declaration in
unwind-cxx.h which should have been changed too.

libstdc++-v3/ChangeLog:

	PR libstdc++/112997
	* libsupc++/unwind-cxx.h (__cxa_call_terminate): Change first
	parameter to void*.

As the comment notes, the increased timeout was needed because of PR
102780, but that was fixed long ago.

libstdc++-v3/ChangeLog:

	* testsuite/20_util/variant/87619.cc: Remove dg-timeout-factor.

This reduces the overhead of using std::is_trivially_destructible_v and
as a result fixes some recent regressions seen with a non-default
GLIBCXX_TESTSUITE_STDS env var:
FAIL: 20_util/variant/87619.cc  -std=gnu++20 (test for excess errors)
FAIL: 20_util/variant/87619.cc  -std=gnu++23 (test for excess errors)
FAIL: 20_util/variant/87619.cc  -std=gnu++26 (test for excess errors)

libstdc++-v3/ChangeLog:

	* include/std/type_traits (is_trivially_destructible_v): Use
	built-in directly when concepts are supported.
	* testsuite/20_util/is_trivially_destructible/value_v.cc: New
	test.

Fix testsuite when compiling with -Wformat. Use nonnull arguments so
that -Wformat does not cause extraneous output to be reported as an
error.

FAIL: tr1/8_c_compatibility/cinttypes/functions.cc (test for excess errors)

libstdc++-v3/ChangeLog:

	* testsuite/tr1/8_c_compatibility/cinttypes/functions.cc: Use
	nonnull arguments to strtoimax() and wcstoimax() functions.

Signed-off-by: Gwenole Beauchesne <gb.devel@gmail.com>

gcc/fortran/ChangeLog:

	PR fortran/96724
	* iresolve.cc (gfc_resolve_repeat): Force conversion to
	gfc_charlen_int_kind before call to gfc_multiply.

gcc/testsuite/ChangeLog:

	PR fortran/96724
	* gfortran.dg/repeat_8.f90: New test.

Co-authored-by: José Rui Faustino de Sousa <jrfsousa@gmail.com>

Additionally, it fixes a typo and changes the OpenMP 5.2 section
references (18.8.x) to OpenMP 5.1 ones (3.8.x) matching the mentioned
OpenMP number.

libgomp/ChangeLog:

	* libgomp.texi (OpenMP Technical Report 12): Fix a typo.
	(Device Memory Routines): Fix OpenMP 5.1 spec refs; add
	omp_target_is_accessible.
	(Environment Display Routine): Uncomment and add
	omp_display_env description.
	(OMP_DISPLAY_ENV): Update wording, add 'see also'.

For instruction xvpermi.q, unused bits in operands[3] need be set to 0 to avoid
causing undefined behavior on LA464.

gcc/ChangeLog:

	* config/loongarch/lasx.md: Set the unused bits in operand[3] to 0.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/vector/lasx/lasx-xvpremi.c: Removed.
	* gcc.target/loongarch/vector/lasx/lasx-xvpermi_q.c: New test.

This patch fixes a bug of VSETVL PASS in this following situation:

    Ignore curr info since prev info available with it:
      prev_info: VALID (insn 8, bb 2)
        Demand fields: demand_ratio_and_ge_sew demand_avl
        SEW=16, VLMUL=mf4, RATIO=64, MAX_SEW=64
        TAIL_POLICY=agnostic, MASK_POLICY=agnostic
        AVL=(const_int 1 [0x1])
        VL=(nil)
      curr_info: VALID (insn 12, bb 2)
        Demand fields: demand_ge_sew demand_non_zero_avl
        SEW=16, VLMUL=m1, RATIO=16, MAX_SEW=32
        TAIL_POLICY=agnostic, MASK_POLICY=agnostic
        AVL=(const_int 1 [0x1])
        VL=(nil)

We should update prev_info MAX_SEW from 64 into 32.

Before this patch:
foo:
        vsetivli        zero,1,e64,m1,ta,ma
        vle64.v v1,0(a1)
        vmv.s.x v3,a0
        vfmv.s.f        v2,fa0
        vadd.vv v1,v1,v1
        ret

After this patch:
foo:
	vsetivli	zero,1,e16,mf4,ta,ma
	vle64.v	v1,0(a1)
	vmv.s.x	v3,a0
	vfmv.s.f	v2,fa0
	vsetvli	zero,zero,e64,m1,ta,ma
	vadd.vv	v1,v1,v1
	ret

Tested on both RV32 and RV64 no regression. Committed.

	PR target/113248

gcc/ChangeLog:

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info):
	Update the MAX_SEW.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/pr113248.c: New test.

1). We not only have vashl_optab,vashr_optab,vlshr_optab which vectorize shift with vector shift amount,
that is, vectorization of 'a[i] >> x[i]', the shift amount is loop variant.
2). But also, we have ashl_optab, ashr_optab, lshr_optab which can vectorize shift with scalar shift amount,
that is, vectorization of 'a[i] >> x', the shift amount is loop invariant.

For the 2) case, we don't need to allocate a vector register group for shift amount.

So consider this following case:

void
f (int *restrict a, int *restrict b, int *restrict c, int *restrict d, int x,
   int n)
{
  for (int i = 0; i < n; i++)
    {
      int tmp = b[i] >> x;
      int tmp2 = tmp * b[i];
      c[i] = tmp2 * b[i];
      d[i] = tmp * tmp2 * b[i] >> x;
    }
}

Before this patch, we choose LMUL = 4, now after this patch, we can choose LMUL = 8:

f:
	ble	a5,zero,.L5
.L3:
	vsetvli	a0,a5,e32,m8,ta,ma
	slli	a6,a0,2
	vle32.v	v16,0(a1)
	vsra.vx	v24,v16,a4
	vmul.vv	v8,v24,v16
	vmul.vv	v0,v8,v16
	vse32.v	v0,0(a2)
	vmul.vv	v8,v8,v24
	vmul.vv	v8,v8,v16
	vsra.vx	v8,v8,a4
	vse32.v	v8,0(a3)
	add	a1,a1,a6
	add	a2,a2,a6
	add	a3,a3,a6
	sub	a5,a5,a0
	bne	a5,zero,.L3
.L5:
	ret

Tested on both RV32/RV64 no regression.  Ok for trunk ?

Note that we will apply same heuristic for vadd.vx, ... etc when the late-combine pass from
Richard Sandiford is committed (Since we need late combine pass to do vv->vx transformation for vadd).

gcc/ChangeLog:

	* config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): New function.
	(variable_vectorized_p): Teach loop invariant.
	(has_unexpected_spills_p): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul4-12.c: New test.
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul8-14.c: New test.