- Mar 04, 2025
-
-
Richard Sandiford authored
There was an embarrassing typo in the folding of BIT_NOT_EXPR for POLY_INT_CSTs: it used - rather than ~ on the poly_int. Not sure how that happened, but it might have been due to the way that ~x is implemented as -1 - x internally. gcc/ PR tree-optimization/118976 * fold-const.cc (const_unop): Use ~ rather than - for BIT_NOT_EXPR. * config/aarch64/aarch64.cc (aarch64_test_sve_folding): New function. (aarch64_run_selftests): Run it.
-
Richard Sandiford authored
The following testcase is miscompiled on powerpc64le-linux starting with r15-6777. During combine we see: (set (reg:SI 134) (ior:SI (ge:SI (reg:CCFP 128) (const_int 0 [0])) (lt:SI (reg:CCFP 128) (const_int 0 [0])))) The simplify_logical_relational_operation code (in its current form) was written with arithmetic rather than CC modes in mind. Since CCFP is a CC mode, it fails the HONOR_NANS check, and so the function assumes that ge | lt => true. If one comparison is unsigned then it should be safe to assume that the other comparison is also unsigned, even for CC modes, since the optimisation checks that the comparisons are between the same operands. For the other cases, we can only safely fold comparisons of CC mode values if the result is always-true (15) or always-false (0). It turns out that the original testcase for PR117186, which ran at -O, was relying on the old behaviour for some of the functions. It needs 4-instruction combinations, and so -fexpensive-optimizations, to pass in its intended form. gcc/ PR rtl-optimization/119002 * simplify-rtx.cc (simplify_context::simplify_logical_relational_operation): Handle comparisons between CC values. If there is no evidence that the CC values are unsigned, restrict the fold to always-true or always-false results. gcc/testsuite/ * gcc.c-torture/execute/ieee/pr119002.c: New test. * gcc.target/aarch64/pr117186.c: Run at -O2 rather than -O. Co-authored-by:
Jakub Jelinek <jakub@redhat.com>
-
Jakub Jelinek authored
Uros' r15-7793 fixed this PR as well, I'm just committing tests from the PR so that it can be closed. 2025-03-04 Jakub Jelinek <jakub@redhat.com> PR rtl-optimization/119071 * gcc.dg/pr119071.c: New test. * gcc.c-torture/execute/pr119071.c: New test.
-
Andre Vehreschild authored
PR fortran/77872 gcc/fortran/ChangeLog: * trans-expr.cc (gfc_get_tree_for_caf_expr): Pick up token from decl when it is present there for class types. gcc/testsuite/ChangeLog: * gfortran.dg/coarray/class_1.f90: New test.
-
Andre Vehreschild authored
PR fortran/77872 gcc/fortran/ChangeLog: * trans-expr.cc (gfc_conv_procedure_call): Use attr instead of doing type check and branching for BT_CLASS.
-
Richard Biener authored
When we vectorize a .COND_ADD reduction and apply the single-use-def cycle optimization we can end up chosing the wrong else value for subsequent .COND_ADD. The following rectifies this. PR tree-optimization/119096 * tree-vect-loop.cc (vect_transform_reduction): Use the correct else value for .COND_fn. * gcc.dg/vect/pr119096.c: New testcase.
-
Pan Li authored
The bug-3.c would like to check the slli a[0-9]+, a[0-9]+, 33 for the big poly int handling. But the underlying insn may change to slli 1 + slli 32 with sorts of optimization. Thus, update the asm check to function body check with above slli 1 + slli 32 series. The below test suites are passed for this patch. * The rv64gcv fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/bug-3.c: Update asm check to function body check. Signed-off-by:
Pan Li <pan2.li@intel.com>
-
GCC Administrator authored
-
- Mar 03, 2025
-
-
Joseph Myers authored
gcc/po/ * be.po, da.po, de.po, el.po, es.po, fi.po, fr.po, hr.po, id.po, ja.po, ka.po, nl.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, zh_TW.po: Update. libcpp/po/ * be.po, ca.po, da.po, de.po, el.po, eo.po, es.po, fi.po, fr.po, id.po, ja.po, ka.po, nl.po, pt_BR.po, ro.po, ru.po, sr.po, sv.po, tr.po, uk.po, vi.po, zh_CN.po, zh_TW.po: Update.
-
Harald Anlauf authored
PR fortran/101577 gcc/fortran/ChangeLog: * symbol.cc (verify_bind_c_derived_type): Generate error message for derived type with no components in standard conformance mode, indicating that this is a GNU extension. gcc/testsuite/ChangeLog: * gfortran.dg/empty_derived_type.f90: Adjust dg-options. * gfortran.dg/empty_derived_type_2.f90: New test.
-
Andrew Carlotti authored
Refactor the switcher classes into two separate classes: - sve_alignment_switcher takes the alignment switching functionality, and is used only for ABI correctness when defining sve structure types. - aarch64_target_switcher takes the rest of the functionality of aarch64_simd_switcher and sve_switcher, and gates simd/sve specific parts upon the specified feature flags. Additionally, aarch64_target_switcher now adds dependencies of the specified flags (which adds +fcma and +bf16 to some intrinsic declarations), and unsets current_target_pragma. This last change fixes an internal bug where we would sometimes add a user specified target pragma (stored in current_target_pragma) on top of an internally specified target architecture while initialising intrinsics with `#pragma GCC aarch64 "arm_*.h"`. As far as I can tell, this has no visible impact at the moment. However, the unintended target feature combinations lead to unwanted behaviour in an under-development patch. This also fixes a missing Makefile dependency, which was due to aarch64-sve-builtins.o incorrectly depending on the undefined $(REG_H). The correct $(REGS_H) dependency is added to the switcher's new source location. gcc/ChangeLog: * common/config/aarch64/aarch64-common.cc (struct aarch64_extension_info): Add field. (aarch64_get_required_features): New. * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher): Rename to... (aarch64_target_switcher::aarch64_target_switcher): ...this, and extend to handle sve, nosimd and target pragmas. (aarch64_simd_switcher::~aarch64_simd_switcher): Rename to... (aarch64_target_switcher::~aarch64_target_switcher): ...this, and extend to handle sve, nosimd and target pragmas. (handle_arm_acle_h): Use aarch64_target_switcher. (handle_arm_neon_h): Rename switcher and pass explicit flags. (aarch64_general_init_builtins): Ditto. * config/aarch64/aarch64-protos.h (class aarch64_simd_switcher): Rename to... (class aarch64_target_switcher): ...this, and add new members. (aarch64_get_required_features): New prototype. * config/aarch64/aarch64-sve-builtins.cc (sve_switcher::sve_switcher): Delete (sve_switcher::~sve_switcher): Delete (sve_alignment_switcher::sve_alignment_switcher): New (sve_alignment_switcher::~sve_alignment_switcher): New (register_builtin_types): Use alignment switcher (init_builtins): Rename switcher. (handle_arm_neon_sve_bridge_h): Ditto. (handle_arm_sme_h): Ditto. (handle_arm_sve_h): Ditto, and use alignment switcher. * config/aarch64/aarch64-sve-builtins.h (class sve_switcher): Delete. (class sme_switcher): Delete. (class sve_alignment_switcher): New. * config/aarch64/t-aarch64 (aarch64-builtins.o): Add $(REGS_H). (aarch64-sve-builtins.o): Remove $(REG_H).
-
Richard Earnshaw authored
The code in gcc.target/unsigned-extend-1.c really should not need an unsigned extension operations when the optimizers are used. For Arm and thumb2 that is indeed the case, but for thumb1 code it gets more complicated as there are too many instructions for combine to look at. For thumb1 we end up with two redundant zero_extend patterns which are not removed: the first after the subtract instruction and the second of the final boolean result. We can partially fix this (for the second case above) by adding a new split pattern for LEU and GEU patterns which work because the two instructions for the [LG]EU pattern plus the redundant extension instruction are combined into a single insn, which we can then split using the 3->2 method back into the two insns of the [LG]EU sequence. Because we're missing the optimization for all thumb1 cases (not just those architectures with UXTB), I've adjust the testcase to detect all the idioms that we might use for zero-extending a value, namely: UXTB AND ...#255 (in thumb1 this would require a register to hold 255) LSL ... #24; LSR ... #24 but I've also marked this test as XFAIL for thumb1 because we can't yet eliminate the first of the two extend instructions. gcc/ * config/arm/thumb1.md (split patterns for GEU and LEU): New. gcc/testsuite: * gcc.target/arm/unsigned-extend-1.c: Expand check for any insn suggesting a zero-extend. XFAIL for thumb1 code.
-
Uros Bizjak authored
This reverts commit f1c30c62.
-
Uros Bizjak authored
Reverse negative logic in !a ? b : c to become a ? c : b. No functional changes. gcc/ChangeLog: * combine.cc (distribute_notes): Reverse negative logic in ternary operators.
-
Uros Bizjak authored
The combine pass is trying to combine: Trying 16, 22, 21 -> 23: 16: r104:QI=flags:CCNO>0 22: {r120:QI=r104:QI^0x1;clobber flags:CC;} REG_UNUSED flags:CC 21: r119:QI=flags:CCNO<=0 REG_DEAD flags:CCNO 23: {r110:QI=r119:QI|r120:QI;clobber flags:CC;} REG_DEAD r120:QI REG_DEAD r119:QI REG_UNUSED flags:CC and creates the following two insn sequence: modifying insn i2 22: r104:QI=flags:CCNO>0 REG_DEAD flags:CC deferring rescan insn with uid = 22. modifying insn i3 23: r110:QI=flags:CCNO<=0 REG_DEAD flags:CC deferring rescan insn with uid = 23. where the REG_DEAD note in i2 is not correct, because the flags register is still referenced in i3. In try_combine() megafunction, we have this part: --cut here-- /* Distribute all the LOG_LINKS and REG_NOTES from I1, I2, and I3. */ if (i3notes) distribute_notes (i3notes, i3, i3, newi2pat ? i2 : NULL, elim_i2, elim_i1, elim_i0); if (i2notes) distribute_notes (i2notes, i2, i3, newi2pat ? i2 : NULL, elim_i2, elim_i1, elim_i0); if (i1notes) distribute_notes (i1notes, i1, i3, newi2pat ? i2 : NULL, elim_i2, local_elim_i1, local_elim_i0); if (i0notes) distribute_notes (i0notes, i0, i3, newi2pat ? i2 : NULL, elim_i2, elim_i1, local_elim_i0); if (midnotes) distribute_notes (midnotes, NULL, i3, newi2pat ? i2 : NULL, elim_i2, elim_i1, elim_i0); --cut here-- where the compiler distributes REG_UNUSED note from i2: 22: {r120:QI=r104:QI^0x1;clobber flags:CC;} REG_UNUSED flags:CC via distribute_notes() using the following: --cut here-- /* Otherwise, if this register is used by I3, then this register now dies here, so we must put a REG_DEAD note here unless there is one already. */ else if (reg_referenced_p (XEXP (note, 0), PATTERN (i3)) && ! (REG_P (XEXP (note, 0)) ? find_regno_note (i3, REG_DEAD, REGNO (XEXP (note, 0))) : find_reg_note (i3, REG_DEAD, XEXP (note, 0)))) { PUT_REG_NOTE_KIND (note, REG_DEAD); place = i3; } --cut here-- Flags register is used in I3, but there already is a REG_DEAD note in I3. The above condition doesn't trigger and continues in the "else" part where REG_DEAD note is put to I2. The proposed solution corrects the above logic to trigger every time the register is referenced in I3, avoiding the "else" part. PR rtl-optimization/118739 gcc/ChangeLog: * combine.cc (distribute_notes) <case REG_UNUSED>: Correct the logic when the register is used by I3. gcc/testsuite/ChangeLog: * gcc.target/i386/pr118739.c: New test.
-
Martin Jambor authored
Since we construct arithmetic jump functions even when there is a type conversion in between the operation encoded in the jump function and when it is passed in a call argument, the IPA propagation phase must also perform the operation and conversion in two steps. IPA-VR had actually been doing it even before for binary operations but, as PR 118756 exposes, not in the case on unary operations. This patch adds the necessary step to rectify that. Like in the scalar constant case, we depend on expr_type_first_operand_type_p to determine the type of the result of the arithmetic operation. On top this, the patch special-cases ABSU_EXPR because it looks useful an so that the PR testcase exercises the added code-path. This seems most appropriate for stage 4, long term we should probably stream the types, probably after also encoding them with a string of expr_eval_op rather than what we have today. A check for expr_type_first_operand_type_p was also missing in the handling of binary ops and the intermediate value_range was initialized with a wrong type, so I also fixed this. gcc/ChangeLog: 2025-02-24 Martin Jambor <mjambor@suse.cz> PR ipa/118785 * ipa-cp.cc (ipa_vr_intersect_with_arith_jfunc): Handle non-conversion unary operations separately before doing any conversions. Check expr_type_first_operand_type_p for non-unary operations too. Fix type of op_res. gcc/testsuite/ChangeLog: 2025-02-24 Martin Jambor <mjambor@suse.cz> PR ipa/118785 * g++.dg/lto/pr118785_0.C: New test.
-
Richard Biener authored
We are detecting a cycle as double reduction where the inner loop cycle has extra out-of-loop uses. This clashes at least with assumptions from the SLP discovery code which says the cycle isn't reachable from another SLP instance. It also was not intended to support this case, in fact with GCC 14 we seem to generate wrong code here. PR tree-optimization/119057 * tree-vect-loop.cc (check_reduction_path): Add argument specifying whether we're analyzing the inner loop of a double reduction. Do not allow extra uses outside of the double reduction cycle in this case. (vect_is_simple_reduction): Adjust. * gcc.dg/vect/pr119057.c: New testcase.
-
Richard Biener authored
odr_types_equivalent_p can end up using TYPE_PRECISION on vector types which is a no-go. The following instead uses TYPE_VECTOR_SUBPARTS for vector types so we also end up comparing the number of vector elements. PR ipa/119067 * ipa-devirt.cc (odr_types_equivalent_p): Check TYPE_VECTOR_SUBPARTS for vectors. * g++.dg/lto/pr119067_0.C: New testcase. * g++.dg/lto/pr119067_1.C: Likewise.
-
Andre Vehreschild authored
Fix a regression were adding a temporary variable inserted a copy of the argument to the elemental function. That copy was then later used to free allocated memory, but the freeing was not tracked in the source array correctly. PR fortran/118747 gcc/fortran/ChangeLog: * trans-array.cc (gfc_trans_array_ctor_element): Remove copy to temporary variable. * trans-expr.cc (gfc_conv_procedure_call): Use references to array members instead of copies when freeing after use. Formatting fix. gcc/testsuite/ChangeLog: * gfortran.dg/alloc_comp_auto_array_4.f90: New test.
-
GCC Administrator authored
-
- Mar 02, 2025
-
-
Jeff Law authored
I'm not sure if I goof'd this or if I merely upstreamed someone else's goof. Either way the long branch code isn't working correctly. We were using 'n' as the output modifier to negate the condition. But 'n' has a special meaning elsewhere, so when presented with a condition rather than what was expected, boom, the compiler ICE'd. Thankfully there's only a few places where we were using %n which I turned into %r. The BZ entry includes a good testcase, it just takes a long time to compile as it's trying to create the out-of-range scenario. I'm not including the testcase due to how long it takes, but I did test it locally to ensure it's working properly now. I'm sure that with a little bit of work I could create at testcase that worked before and fails with the trunk (by taking advantage of the fuzzyness in length computations). So I'm going to consider this a regression. Will push to the trunk after pre-commit testing does its thing. PR target/118934 gcc/ * config/riscv/corev.md (cv_branch): Adjust output template. (branch): Likewise. * config/riscv/riscv.md (branch): Likewise. * config/riscv/riscv.cc (riscv_asm_output_opcode): Handle 'r' rather than 'n'.
-
Gaius Mulley authored
This patch fixes an ICE which occurs when a FOR statement attempts to use an undeclared variable as its iterator. gcc/m2/ChangeLog: PR modula2/119088 * gm2-compiler/M2SymInit.mod (ConfigSymInit): Reimplement to defensively check for NulSym type. gcc/testsuite/ChangeLog: PR modula2/119088 * gm2/pim/fail/tinyfor4.mod: New test. Signed-off-by:
Gaius Mulley <gaiusmod2@gmail.com>
-
Sandra Loosemore authored
gcc/fortran/ChangeLog * intrinsic.texi: Fix inconsistent capitalization of argument names and other minor copy-editing.
-
Sandra Loosemore authored
As noted in the issue, the version of the standard an intrinsic was introduced in is usually not the second-most-important thing a user needs to know. This patch moves it from near the beginning of each section towards the end, just ahead of "See also". gcc/fortran/ChangeLog PR fortran/47928 * intrinsic.texi: Move the "Standard" subheading farther down.
-
Sandra Loosemore authored
As suggested in the issue, it makes more sense to describe the function call argument syntax before talking about the arguments in the description. gcc/fortran/ChangeLog PR fortran/47928 * gfortran.texi: Move all the "Syntax" subheadings ahead of "Description", and rename to "Synopsis". * intrinsic.texi: Likewise.
-
Sandra Loosemore authored
This is a preparatory patch for the main changes requested in the issue. gcc/fortran/ChangeLog PR fortran/47928 * intrinsic.texi: Put a blank line between "@item @emph{}" subheadings, but not more than one.
-
Sandra Loosemore authored
This is a preparatory patch for the main documentation changes requested in the issue. gcc/fortran/ChangeLog PR fortran/47928 * gfortran.texi: Consistently use "@emph{Notes}:" instead of other spellings. * intrinsic.texi: Likewise. Also fix an inconsistent capitalization and remove a redundant "Standard" entry.
-
Jakub Jelinek authored
As can be seen in gcc/po/gcc.pot: #: config/avr/avr.cc:2754 #, c-format msgid "bad I/O address 0x" msgstr "" exgettext couldn't retrieve the whole format string in this case, because it uses a macro in the middle. output_operand_lossage is c-format function though, so we can't use %wx to print HOST_WIDE_INT, and HOST_WIDE_INT_PRINT_HEX_PURE is on some hosts %lx, on others %llx and on others %I64x so isn't really translatable that way. As Joseph mentioned in the PR, there is no easy way around this but go through a temporary buffer, which the following patch does. 2025-03-02 Jakub Jelinek <jakub@redhat.com> PR translation/118991 * config/avr/avr.cc (avr_print_operand): Print ival into a temporary buffer and use %s in output_operand_lossage to make the diagnostics translatable.
-
Filip Kastl authored
While writing the sccopy pass I didn't realize that 'replace_uses_by ()' can remove portions of the CFG. This happens when replacing arguments of some statement results in the removal of an EH edge. Because of this sccopy can then work with GIMPLE statements that aren't part of the IR anymore. In PR117919 this triggered an assertion within the pass which assumes that statements the pass works with are reachable. This patch tells the pass to notice when a statement isn't in the IR anymore and remove it from it's worklist. PR tree-optimization/117919 gcc/ChangeLog: * gimple-ssa-sccopy.cc (scc_copy_prop::propagate): Prune statements that 'replace_uses_by ()' removed. gcc/testsuite/ChangeLog: * g++.dg/pr117919.C: New test. Signed-off-by:
Filip Kastl <fkastl@suse.cz>
-
GCC Administrator authored
-
- Mar 01, 2025
-
-
Gerald Pfeifer authored
gcc: PR target/69374 * doc/install.texi (Specific, *-*-freebsd*): Simplify description.
-
Jakub Jelinek authored
Apparently I got one of the !HAVE_ATTRIBUTE_ALIAS fallbacks wrong. It compiled with a warning: ../../gcc/ggc-common.cc: In function 'void* ggc_internal_cleared_alloc_no_dtor(size_t, void (*)(void*), size_t, size_t)': ../../gcc/ggc-common.cc:154:44: warning: unused parameter 'size' [-Wunused-parameter] 154 | ggc_internal_cleared_alloc_no_dtor (size_t size, void (*f)(void *), | ~~~~~~~^~~~ and obviously didn't work right (always allocated 0-sized objects). Fixed thusly. 2025-03-01 Jakub Jelinek <jakub@redhat.com> PR jit/117047 * ggc-common.cc (ggc_internal_cleared_alloc_no_dtor): Pass size rather than s as the first argument to ggc_internal_cleared_alloc.
-
Harald Anlauf authored
gcc/fortran/ChangeLog: * match.cc (gfc_match_nullify): Free matched expression when cleaning up. * primary.cc (match_variable): Initialize result to NULL.
-
Yuriy Kolerov authored
zce must imply zcf but this rule was corrupted after refactoring in 9e12010b. This may be observed ater generating an .s file from any source code file with -mriscv-attribute -march=rv32if_zce -mabi=ilp32 -S options. A full march will be presented in arch attribute: rv32i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0 As you see, zcf is not presented here though f_zce pair is passed in -march. According to The RISC-V Instruction Set Manual: Specifying Zce on RV32 with F includes Zca, Zcb, Zcmp, Zcmt and Zcf. PR target/118906 gcc/ChangeLog: * common/config/riscv/riscv-common.cc: fix zce to zcf implication. gcc/testsuite/ChangeLog: * gcc.target/riscv/attribute-zce-1.c: New test. * gcc.target/riscv/attribute-zce-2.c: New test. * gcc.target/riscv/attribute-zce-3.c: New test. * gcc.target/riscv/attribute-zce-4.c: New test.
-
Jan Dubiec authored
[PATCH] H8/300, libgcc: PR target/114222 For HImode call internal ffs() implementation instead of an external one When INT_TYPE_SIZE < BITS_PER_WORD gcc emits a call to an external ffs() implementation instead of a call to "__builtin_ffs()" – see function init_optabs() in <SRCROOT>/gcc/optabs-libfuncs.cc. External ffs() (which is usually the one from newlib) in turn calls __builtin_ffs() what causes infinite recursion and stack overflow. This patch overrides default gcc bahaviour for H8/300H (and newer) and provides a generic ffs() implementation for HImode. PR target/114222 gcc/ChangeLog: * config/h8300/h8300.cc (h8300_init_libfuncs): For HImode override calls to external ffs() (from newlib) with calls to __ffshi2() from libgcc. The implementation of ffs() in newlib calls __builtin_ffs() what causes infinite recursion and finally a stack overflow. libgcc/ChangeLog: * config/h8300/t-h8300: Add __ffshi2(). * config/h8300/ffshi2.c: New file.
-
Jakub Jelinek authored
As the comment in check_line says: /* get_buffer is not null terminated, but the sscanf stops after a number. */ the buffer is not null terminated, there is line.length () to determine the size of the line. But unlike what the comment says, sscanf actually still requires null terminated string argument, anything else is UB. E.g. glibc when initializing the temporary FILE stream for the string does if (size == 0) end = strchr (ptr, '\0'); and this strchr/rawmemchr is what shows up in valgrind report on cc1/cc1plus doing self-tests. The function is used only in a test with 1000 lines, each containg its number, so numbers from 1 to 1000 inclusive (each time with '\n' separator, but that isn't included in line.length ()). So the function just uses a temporary buffer which can fit numbers from 1 to 1000 as strings with terminating '\0' and runs sscanf on that (why not strtoul?). Furthermore, the caller allocated number of lines * 15 bytes for the string, but 1000\n is 5 bytes, so I think * 5 is more than enough. 2025-03-01 Jakub Jelinek <jakub@redhat.com> PR other/119052 * input.cc (check_line): Don't call sscanf on non-null terminated buffer, instead copy line.length () bytes from line.get_buffer () to a local buffer, null terminate it and call sscanf on that. Formatting fix. (test_replacement): Just allocate maxline * 5 rather than maxline * 15 bytes for the file. Formatting fix.
-
GCC Administrator authored
-
Jakub Jelinek authored
As analyzed by Andrew/David/Richi/Sam in the PR, the reason for the libgccjit ICE is that there are GC allocations with finalizers and we still mark ggc_internal_{,cleared_}alloc with ATTRIBUTE_MALLOC, which to the optimizers hints that nothing will actually read the state of the objects when they get out of lifetime. The finalizer actually inspects those though. What actually happens in the testcases is that on tree expr_size = TYPE_SIZE (expr->get_type ()->as_tree ()); we see that expr->get_type () was allocated using something with malloc attribute but it doesn't escape and only the type size from it is queried, so there is no need to store other members of it. Except that it does escape in the GC internals. Normal GC allocations are fine, they don't look at the data in the allocated objects on "free", but the ones with finalizers actually call a function on that object and expect the data to be in there. So that we don't lose ATTRIBUTE_MALLOC for the common case when no finalization is needed, the following patch uses the approach used e.g. for glibc error function which can sometimes be noreturn but at other times just return normally. If possible, it uses __attribute__((alias ("..."))) to add an alias to the function, where one is without ATTRIBUTE_MALLOC and one (with _no_dtor suffix) is with ATTRIBUTE_MALLOC (note, as this is C++ and I didn't want to hardcode particular mangling I used an extern "C" function with 2 aliases to it), and otherwise adds a wrapper (for the ggc-page/ggc-common case with noinline attribute if possible, for ggc-none that doesn't matter because ggc-none doesn't support finalizers). The *_no_dtor aliases/wrappers are then used in inline functions which pass unconditional NULL, 0 as the f/s pair. 2025-03-01 Jakub Jelinek <jakub@redhat.com> PR jit/117047 * acinclude.m4 (gcc_CHECK_ATTRIBUTE_ALIAS): New. * configure.ac: Add gcc_CHECK_ATTRIBUTE_ALIAS. * ggc.h (ggc_internal_alloc): Remove ATTRIBUTE_MALLOC from overload with finalizer pointer. Call ggc_internal_alloc_no_dtor in inline overload without finalizer pointer. (ggc_internal_alloc_no_dtor): Declare. (ggc_internal_cleared_alloc): Remove ATTRIBUTE_MALLOC from overload with finalizer pointer. Call ggc_internal_cleared_alloc_no_dtor in inline overload without finalizer pointer. (ggc_internal_cleared_alloc_no_dtor): Declare. (ggc_alloc): Call ggc_internal_alloc_no_dtor if no finalization is needed. (ggc_alloc_no_dtor): Call ggc_internal_alloc_no_dtor. (ggc_cleared_alloc): Call ggc_internal_cleared_alloc_no_dtor if no finalization is needed. (ggc_vec_alloc): Call ggc_internal_alloc_no_dtor if no finalization is needed. (ggc_cleared_vec_alloc): Call ggc_internal_cleared_alloc_no_dtor if no finalization is needed. * ggc-page.cc (ggc_internal_alloc): If HAVE_ATTRIBUTE_ALIAS, turn overload with finalizer into alias to ggc_internal_alloc_ and rename it to ... (ggc_internal_alloc_): ... this, make it extern "C". (ggc_internal_alloc_no_dtor): New alias if HAVE_ATTRIBUTE_ALIAS, otherwise new noinline wrapper. * ggc-common.cc (ggc_internal_cleared_alloc): If HAVE_ATTRIBUTE_ALIAS, turn overload with finalizer into alias to ggc_internal_alloc_ and rename it to ... (ggc_internal_cleared_alloc_): ... this, make it extern "C". (ggc_internal_cleared_alloc_no_dtor): New alias if HAVE_ATTRIBUTE_ALIAS, otherwise new noinline wrapper. * ggc-none.cc (ggc_internal_alloc): If HAVE_ATTRIBUTE_ALIAS, turn overload with finalizer into alias to ggc_internal_alloc_ and rename it to ... (ggc_internal_alloc_): ... this, make it extern "C". (ggc_internal_alloc_no_dtor): New alias if HAVE_ATTRIBUTE_ALIAS, otherwise new wrapper. (ggc_internal_cleared_alloc): If HAVE_ATTRIBUTE_ALIAS, turn overload with finalizer into alias to ggc_internal_alloc_ and rename it to ... (ggc_internal_cleared_alloc_): ... this, make it extern "C". (ggc_internal_cleared_alloc_no_dtor): New alias if HAVE_ATTRIBUTE_ALIAS, otherwise new wrapper. * genmatch.cc (ggc_internal_cleared_alloc, ggc_free): Formatting fix. (ggc_internal_cleared_alloc_no_dtor): Define. * config.in: Regenerate. * configure: Regenerate.
-
Jakub Jelinek authored
The following testcase ICEs since r14-5057. The Intel vector ABI says that in the ZMM case the masks is passed in unsigned int or unsigned long long arguments and how many bits in them and how many of those arguments are is determined by the characteristic data type of the function. In the testcase simdlen is 32 and characteristic data type is double, so return as well as first argument is passed in 4 V8DFmode arguments and the mask is supposed to be passed in 4 unsigned int arguments (8 bits in each). Before the r14-5057 change there was sc->args[i].orig_type = parm_type; ... case SIMD_CLONE_ARG_TYPE_LINEAR_VAL_CONSTANT_STEP: case SIMD_CLONE_ARG_TYPE_LINEAR_VAL_VARIABLE_STEP: case SIMD_CLONE_ARG_TYPE_VECTOR: if (INTEGRAL_TYPE_P (parm_type) || POINTER_TYPE_P (parm_type)) veclen = sc->vecsize_int; else veclen = sc->vecsize_float; if (known_eq (veclen, 0U)) veclen = sc->simdlen; else veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (parm_type))); for the argument handling and if (sc->inbranch) { tree base_type = simd_clone_compute_base_data_type (sc->origin, sc); ... if (INTEGRAL_TYPE_P (base_type) || POINTER_TYPE_P (base_type)) veclen = sc->vecsize_int; else veclen = sc->vecsize_float; if (known_eq (veclen, 0U)) veclen = sc->simdlen; else veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (base_type))); for the mask handling. r14-5057 moved this argument creation later and unified that: case SIMD_CLONE_ARG_TYPE_MASK: case SIMD_CLONE_ARG_TYPE_LINEAR_VAL_CONSTANT_STEP: case SIMD_CLONE_ARG_TYPE_LINEAR_VAL_VARIABLE_STEP: case SIMD_CLONE_ARG_TYPE_VECTOR: if (sc->args[i].arg_type == SIMD_CLONE_ARG_TYPE_MASK && sc->mask_mode != VOIDmode) elem_type = boolean_type_node; else elem_type = TREE_TYPE (sc->args[i].vector_type); if (INTEGRAL_TYPE_P (elem_type) || POINTER_TYPE_P (elem_type)) veclen = sc->vecsize_int; else veclen = sc->vecsize_float; if (known_eq (veclen, 0U)) veclen = sc->simdlen; else veclen = exact_div (veclen, GET_MODE_BITSIZE (SCALAR_TYPE_MODE (elem_type))); This is correct for the argument cases (so linear or vector) (though POINTER_TYPE_P will never appear as TREE_TYPE of a vector), but the boolean_type_node in there is completely bogus, when using AVX512 integer masks as I wrote above we need the characteristic data type, not bool, and bool is strange in that it has bitsize of 8 (or 32 on darwin), while the masks are 1 bit per lane anyway. Fixed thusly. 2025-03-01 Jakub Jelinek <jakub@redhat.com> PR middle-end/115871 * omp-simd-clone.cc (simd_clone_adjust): For SIMD_CLONE_ARG_TYPE_MASK and sc->mask_mode not VOIDmode, set elem_type to the characteristic type rather than boolean_type_node. * gcc.dg/gomp/simd-clones-8.c: New test.
-
Jan Dubiec authored
This patch fixes annoying -Wformat warnings when gcc is built on Windows/MinGW64. Instead of %ld it uses HOST_WIDE_INT_PRINT_DEC macro, just like many other targets do. PR target/109189 gcc/ChangeLog: * config/h8300/h8300.cc (h8300_print_operand): Replace %ld format strings with HOST_WIDE_INT_PRINT_DEC macro in order to silence -Wformat warnings when building on Windows/MinGW64.
-