Split the aarch64_<sur>q<r>shr<u>n_n<mode> pattern into separate
scalar and vector variants. Further split the vector pattern into
big/little endian variants that model the zero-high-half semantics
of the underlying instruction - allowing for more combinations with
the write-to-high-half variant (aarch64_<sur>q<r>shr<u>n2_n<mode>.)

gcc/ChangeLog:

2021-05-14  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Split builtin
	generation for aarch64_<sur>q<r>shr<u>n_n<mode> pattern into
	separate scalar and vector generators.
	* config/aarch64/aarch64-simd.md
	(aarch64_<sur>q<r>shr<u>n_n<mode>): Define as an expander and
	split into...
	(aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): This and...
	(aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): This.
	* config/aarch64/iterators.md: Define SD_HSDI iterator.

Use UNSPEC_SQXTUN instead of UNSPEC_SQXTUN2 in aarch64_sqxtun2<mode>
patterns. This allows for more more aggressive combinations and
ultimately better code generation. The now redundant UNSPEC_SQXTUN2
is removed.

gcc/ChangeLog:

2021-05-14  Jonathn Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd.md: Use UNSPEC_SQXTUN instead
	of UNSPEC_SQXTUN2.
	* config/aarch64/iterators.md: Remove UNSPEC_SQXTUN2.

Implement saturating right-shift and narrow high Neon intrinsic RTL
patterns using a vec_concat of a register_operand and a VQSHRN_N
unspec - instead of just a VQSHRN_N unspec. This more relaxed pattern
allows for more aggressive combinations and ultimately better code
generation.

gcc/ChangeLog:

2021-03-04  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n2_n<mode>):
	Implement as an expand emitting a big/little endian
	instruction pattern.
	(aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Define.
	(aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Define.

Implement v[r]addhn2 and v[r]subhn2 Neon intrinsic RTL patterns using
a vec_concat of a register_operand and an ADDSUBHN unspec - instead
of just an ADDSUBHN2 unspec. This more relaxed pattern allows for
more aggressive combinations and ultimately better code generation.

This patch also removes the now redundant [R]ADDHN2 and [R]SUBHN2
unspecs and their iterator.

gcc/ChangeLog:

2021-03-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>):
	Implement as an expand emitting a big/little endian
	instruction pattern.
	(aarch64_<sur><addsub>hn2<mode>_insn_le): Define.
	(aarch64_<sur><addsub>hn2<mode>_insn_be): Define.
	* config/aarch64/iterators.md: Remove UNSPEC_[R]ADDHN2 and
	UNSPEC_[R]SUBHN2 unspecs and ADDSUBHN2 iterator.

This fixes the bogus use of TYPE_PRECISION on vector types
from optimizing -((int)x >> 31) into (unsigned)x >> 31.

2021-05-19  Richard Biener  <rguenther@suse.de>

	PR middle-end/100672
	* fold-const.c (fold_negate_expr_1): Use element_precision.
	(negate_expr_p): Likewise.

	* gcc.dg/torture/pr100672.c: New testcase.

	PR testsuite/100658

gcc/cp/ChangeLog:

	* mangle.c (write_encoding): Fix typos.

gcc/jit/ChangeLog:

	* libgccjit.c (gcc_jit_context_new_function): Fix typos.

gcc/testsuite/ChangeLog:

	* gcc.dg/local1.c: Fix typos.
	* gcc.dg/ucnid-5-utf8.c: Likewise.
	* gcc.dg/ucnid-5.c: Likewise.

This patch will enable the use of loads using the UNSPEC_PRED_X enum in the
aarch64_load pattern, thus enabling combine to combine such loads with extends.

gcc/ChangeLog:
2021-05-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/iterators.md (SVE_PRED_LOAD): New iterator.
	(pred_load): New int attribute.
	* config/aarch64/aarch64-sve.md
	(aarch64_load_<ANY_EXTEND:optab><SVE_HSDI:mode><SVE_PARTIAL_I:mode>): Use
	SVE_PRED_LOAD enum iterator and corresponding pred_load attribute.
	* config/aarch64/aarch64-sve-builtins-base.cc (expand): Update call to
	code_for_aarch64_load.

gcc/testsuite/ChangeLog:
2021-05-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* gcc.target/aarch64/sve/logical_unpacked_and_2.c: Change
	scan-assembly-times to scan-assembly not for superfluous uxtb.
	* gcc.target/aarch64/sve/logical_unpacked_and_3.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_and_4.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_and_6.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_and_7.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_eor_2.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_eor_3.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_eor_4.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_eor_6.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_eor_7.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_orr_2.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_orr_3.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_orr_4.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_orr_6.c: Likewise.
	* gcc.target/aarch64/sve/logical_unpacked_orr_7.c: Likewise.
	* gcc.target/aarch64/sve/ld1_extend.c: New test.

The following does no longer mark TARGET_MEM_REF bases addressable,
mimicing MEM_REFs beahvior here.  In contrast to the latter,
TARGET_MEM_REF RTL expansion expects to always operate on memory
though, so make sure we expand them so.

2021-05-19  Richard Biener  <rguenther@suse.de>

	* cfgexpand.c (discover_nonconstant_array_refs_r): Make
	sure TARGET_MEM_REF bases are expanded as memory.
	* tree-ssa-operands.c (operands_scanner::get_tmr_operands):
	Do not mark TARGET_MEM_REF bases addressable.
	* tree-ssa.c (non_rewritable_mem_ref_base): Handle
	TARGET_MEM_REF bases as never rewritable.
	* gimple-walk.c (walk_stmt_load_store_addr_ops): Do not
	walk TARGET_MEM_REF bases as address-takens.
	* tree-ssa-dce.c (ref_may_be_aliased): Handle TARGET_MEM_REF.

This enables the alias machinery for WITH_SIZE_EXPR which can appear
in call LHS and arguments.  In particular this drops the NULL
return from get_base_address and it adjusts get_ref_base_and_extent
and friends to use the size information in WITH_SIZE_EXPR and
look through it for further processing.

2021-05-19  Richard Biener  <rguenther@suse.de>

	* builtins.c (get_object_alignment_1): Strip outer
	WITH_SIZE_EXPR.
	* tree-dfa.c (get_ref_base_and_extent): Handle outer
	WITH_SIZE_EXPR for size processing and process the
	containing ref.
	* tree-ssa-alias.c (ao_ref_base_alias_set): Strip
	outer WITH_SIZE_EXPR.
	(ao_ref_base_alias_ptr_type): Likewise.
	(refs_may_alias_p_2): Allow WITH_SIZE_EXPR in ref->ref
	and handle that accordingly, stripping it for the
	core alias workers.
	* tree.c (get_base_address): Handle WITH_SIZE_EXPR by
	looking through it instead of returning NULL.

... to at least document/test/XFAIL nvptx offloading: PR83812 "operation not
supported on global/shared address space".

	libgomp/
	PR target/83812
	* testsuite/libgomp.oacc-c-c++-common/private-atomic-1.c: New.

	libgomp/
	* testsuite/libgomp.oacc-c-c++-common/loop-gwv-2.c: New.

For unprototyped builtins the checking we perform is only about whether
the used argument is integral, pointer etc., not the exact precision.
We emit a warning about the problem though:
pr100576.c: In function ‘foo’:
pr100576.c:9:11: warning: implicit declaration of function ‘memcmp’ [-Wimplicit-function-declaration]
    9 |   int n = memcmp (p, v, b);
      |           ^~~~~~
pr100576.c:1:1: note: include ‘<string.h>’ or provide a declaration of ‘memcmp’
  +++ |+#include <string.h>
    1 | /* PR middle-end/100576 */
pr100576.c:9:25: warning: ‘memcmp’ argument 3 type is ‘int’ where ‘long unsigned int’ is expected in a call to built-in function declared without prototype
+[-Wbuiltin-declaration-mismatch]
    9 |   int n = memcmp (p, v, b);
      |                         ^
It means in the testcase below where the user incorrectly called memcmp
with last argument int rather then size_t, the warning stuff in builtins.c
ICEs because it compares a wide_int from such a bound with another wide_int
which has precision of size_t/sizetype and wide_int asserts the compared
wide_ints are compatible.

Fixed by forcing the bound to have the right type.

2021-05-19  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/100576
	* builtins.c (check_read_access): Convert bound to size_type_node if
	non-NULL.

	* gcc.c-torture/compile/pr100576.c: New test.

This inlines verify_types_in_gimple_min_lval and makes sure we
also verify call lhs and arguments.  It also asserts that
WITH_SIZE_EXPR in plain assignments does not happen, instead
those should have become memcpy/memset.

2021-05-18  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (verify_types_in_gimple_min_lval): Inline...
	(verify_types_in_gimple_reference): ... here.  Sanitize.
	(verify_gimple_call): Verify references in LHS and arguments.
	(verify_gimple_assign_single): Reject WITH_SIZE_EXPR.

Allow V8QI, V4HI and V2SI modes in 64bit general registers for
TARGET_64BIT and add alternatives using general registers
to 64bit vector logic instructions.

2021-05-19  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	* config/i386/i386.h (VALID_INT_MODE_P):
	Add V8QI, V4HI and V2SI modes for TARGET_64BIT.
	* config/i386/i386.md (isa): Add x64_bmi.
	(enabled): Handle x64_bmi.
	* config/i386/mmx.md (mmx_andnot<MMXMODEI:mode>3):
	Add alternative using 64bit general registers.
	(*mmx_<any_logic:code><MMXMODEI:mode>3): Ditto.

the test case was accidenally changed to empty file.

2021-05-19  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	* gcc.dg/tree-ssa/ssa-sink-3.c: Fix test case.

This patch deals with 2 issues:
1) the gimplifier couldn't differentiate between
 #pragma omp parallel master
 #pragma omp taskloop simd
and
 #pragma omp parallel master taskloop simd
when there is a significant difference for clause handling between
the two; as master construct doesn't have any clauses, we don't currently
represent it during gimplification by an gimplification omp context at all,
so this patch makes sure we don't set OMP_PARALLEL_COMBINED on parallel master
when not combined further.  If we ever add a separate master context during
gimplification, we'd use ORT_COMBINED_MASTER vs. ORT_MASTER (or MASKED probably).
2) lastprivate when combined with target should be map(tofrom:) on the target,
this change handles it only when not combined with firstprivate though, that
will need further work (similarly to linear or reduction).

2021-05-19  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/99928
gcc/
	* tree.h (OMP_MASTER_COMBINED): Define.
	* gimplify.c (gimplify_scan_omp_clauses): Rewrite lastprivate
	handling for outer combined/composite constructs to a loop.
	Handle lastprivate on combined target.
	(gimplify_expr): Formatting fix.
gcc/c/
	* c-parser.c (c_parser_omp_master): Set OMP_MASTER_COMBINED on
	master when combined with taskloop.
	(c_parser_omp_parallel): Don't set OMP_PARALLEL_COMBINED on
	parallel master when not combined with taskloop.
gcc/cp/
	* parser.c (cp_parser_omp_master): Set OMP_MASTER_COMBINED on
	master when combined with taskloop.
	(cp_parser_omp_parallel): Don't set OMP_PARALLEL_COMBINED on
	parallel master when not combined with taskloop.
gcc/testsuite/
	* c-c++-common/gomp/pr99928-2.c: Remove all xfails.
	* c-c++-common/gomp/pr99928-12.c: New test.

This file is copied from a different repo and should not be changed
directly in the GCC repo.

Change-Id: I12766baf02bfdf2233f1c5bde1a270f06b020aa7
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/321076


Trust: Ian Lance Taylor <iant@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Than McIntosh <thanm@google.com>

Gimple sink code pass runs quite early, there may be some new
oppertunities exposed by later gimple optmization passes, this patch
runs the sink code pass once more before store_merging.  For detailed
discussion, please refer to:
https://gcc.gnu.org/pipermail/gcc-patches/2020-December/562352.html

Tested the SPEC2017 performance on P8LE, 544.nab_r is improved
by 2.43%, but no big changes to other cases, GEOMEAN is improved quite
small with 0.25%.

gcc/ChangeLog:

2021-05-18  Xionghu Luo  <luoxhu@linux.ibm.com>

	* passes.def: Add sink_code pass before store_merging.
	* tree-ssa-sink.c (pass_sink_code:clone): New.

gcc/testsuite/ChangeLog:

2021-05-18  Xionghu Luo  <luoxhu@linux.ibm.com>

	* gcc.dg/tree-ssa/ssa-sink-1.c: Adjust.
	* gcc.dg/tree-ssa/ssa-sink-2.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-3.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-4.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-5.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-6.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-7.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-8.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-9.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-10.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-13.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-14.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-16.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-17.c: Ditto.
	* gcc.dg/tree-ssa/ssa-sink-18.c: New.

The change to only look at the global binding for non-classes meant that
here, when dealing with decimal32 which is magically mangled like its first
non-static data member, we got a collision with the mangling for float.
Fixed by also looking up an existing binding for such magical classes.

	PR c++/100261

gcc/cp/ChangeLog:

	* rtti.c (get_tinfo_decl_direct): Check TYPE_TRANSPARENT_AGGR.

gcc/testsuite/ChangeLog:

	* g++.dg/dfp/mangle-6.C: New test.

Here we have a pack expansion of a template template parameter pack, of
which the pattern is a TEMPLATE_DECL, which strip_typedefs doesn't want to
see.

	PR c++/100372

gcc/cp/ChangeLog:

	* tree.c (strip_typedefs): Only look at the pattern of a
	TYPE_PACK_EXPANSION if it's a type.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/alias-decl-ttp1.C: New test.

We're going to start using gnulib in the sim, so make sure it exists.

ChangeLog:

	* Makefile.def: Add configure-sim dependency on all-gnulib.
	* Makefile.in: Regenerated.

Long ago we were forced to make some small ABI breaks to correct errors
in the implementation, and we added warning messages for the changes
from GCC 4.9 to GCC 5.  Enough time has passed that these are now just
irritants, so let's remove them.  Also clean up associated macros using
rs6000_special_adjust_field_align_p, which has been always returning
false for a long time.

2021-05-18  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/freebsd64.h (ADJUST_FIELD_ALIGN): Remove call to
	rs6000_special_adjust_field_align_p.
	* config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Likewise.
	* config/rs6000/rs6000-call.c (rs6000_function_arg_boundary):
	Remove ABI warning.
	(rs6000_function_arg): Likewise.
	* config/rs6000/rs6000-protos.h
	(rs6000_special_adjust_field_align_p): Remove prototype.
	* config/rs6000/rs6000.c (rs6000_special_adjust_field_align_p):
	Remove.
	* config/rs6000/sysv4.h (ADJUST_FIELD_ALIGN): Remove call to
	rs6000_special_adjust_field_align_p.

gcc/testsuite/
	* gcc.target/powerpc/ppc64-abi-warn-1.c: Remove.
	* gcc.target/powerpc/ppc64-abi-warn-2.c: Remove.
	* gcc.target/powerpc/ppc64-abi-warn-3.c: Remove.

gcc/d/ChangeLog:

	* d-incpath.cc (prefixed_path): Use filename_ncmp instead of strncmp.

gcc/d/ChangeLog:

	* types.cc (TypeVisitor::visit (TypeEnum *)): Use startswith function
	instead of strncmp.

This reverts changes to the DMD front-end in commit
6ba3079d.

Changes were incorrectly committed directly to the GCC repo instead of
the master repository.

gcc/d/ChangeLog:

	* dmd/dinterpret.c (evaluateIfBuiltin): Revert last change.
	* dmd/dmangle.c: Likewise.
	* dmd/hdrgen.c: Likewise.
	* dmd/identifier.c (Identifier::toHChars2): Likewise.

I was looking at the LCOV coverage report for the C++ FE and
found a bunch of unused functions that I think we can remove.
Obviously, I left alone various dump_* and debug_* routines.
I haven't removed cp_build_function_call although it is also
currently unused.

* lambda_return_type: was used in parser.c in GCC 7, unused since r255950,
* classtype_has_non_deleted_copy_ctor: appeared in GCC 10, its usage
  was removed in c++/95350,
* contains_wildcard_p: used in GCC 9, unused since r276764,
* get_template_head_requirements: seems to never have been used,
* check_constrained_friend: seems to never have been used,
* subsumes_constraints: unused since r276764,
* push_void_library_fn: usage removed in r248328,
* get_template_parms_at_level: unused since r157857,
* get_pattern_parm: unused since r275387.

(Some of the seemingly unused functions, such as set_global_friend, are
actually used in libcc1.)

gcc/cp/ChangeLog:

	* class.c (classtype_has_non_deleted_copy_ctor): Remove.
	* constraint.cc (contains_wildcard_p): Likewise.
	(get_template_head_requirements): Likewise.
	(check_constrained_friend): Likewise.
	(subsumes_constraints): Likewise.
	* cp-tree.h (classtype_has_non_deleted_copy_ctor): Likewise.
	(push_void_library_fn): Likewise.
	(get_pattern_parm): Likewise.
	(get_template_parms_at_level): Likewise.
	(lambda_return_type): Likewise.
	(get_template_head_requirements): Likewise.
	(check_constrained_friend): Likewise.
	(subsumes_constraints): Likewise.
	* decl.c (push_void_library_fn): Likewise.
	* lambda.c (lambda_return_type): Likewise.
	* pt.c (get_template_parms_at_level): Likewise.
	(get_pattern_parm): Likewise.

This test was fixed by my second patch for PR93314, which distinguishes
between constant-expression and potentially-constant-evaluated contexts in a
way that my first patch did not.

	PR c++/100205
	PR c++/99314

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/decltype-nonstatic1.C: New test.

Here we were ignoring the template constructor because the implicit move
constructor had all perfect conversions.  But CWG1402 says that an
implicitly deleted move constructor is ignored by overload resolution; we
implement that instead by preferring any other candidate in joust, to get
better diagnostics, but that means we need to handle that case here as well.

gcc/cp/ChangeLog:

	PR c++/100644
	* call.c (perfect_candidate_p): An implicitly deleted move
	is not perfect.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/implicit-delete1.C: New test.

PR analyzer/100615 reports a missing leak diagnostic.
The issue is that the code calls strsep which the analyzer doesn't
have special knowledge of, and so conservatively assumes that it
could free the pointer, so drops malloc state for it.

Properly "teaching" the analyzer about strsep would require it
to support bifurcating state at a call, which is currently fiddly to
do, so for now this patch notes that strsep doesn't affect the
malloc state machine, allowing the analyzer to correctly detect the leak.

gcc/analyzer/ChangeLog:
	PR analyzer/100615
	* sm-malloc.cc: Include "analyzer/function-set.h".
	(malloc_state_machine::on_stmt): Call unaffected_by_call_p and
	bail on the functions it recognizes.
	(malloc_state_machine::unaffected_by_call_p): New.

gcc/testsuite/ChangeLog:
	PR analyzer/100615
	* gcc.dg/analyzer/pr100615.c: New test.

Add infrastructure, logic and arithmetic support for 4-byte vectors.
These can be used with SSE2 targets, where movd instructions from/to
XMM registers are available.  x86_64 ABI passes 4-byte vectors in
integer registers, so also add logic operations with integer registers.

2021-05-18  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	PR target/100637
	* config/i386/i386.h (VALID_SSE2_REG_MODE):
	Add V4QI and V2HI modes.
	(VALID_INT_MODE_P): Ditto.
	* config/i386/mmx.md (VI_32): New mode iterator.
	(mmxvecsize): Handle V4QI and V2HI.
	(Yv_Yw): Ditto.
	(mov<VI_32:mode>): New expander.
	(*mov<mode>_internal): New insn pattern.
	(movmisalign<VI_32:mode>): New expander.
	(neg<VI_32:mode>): New expander.
	(<plusminus:insn><VI_32:mode>3): New expander.
	(*<plusminus:insn><VI_32:mode>3): New insn pattern.
	(mulv2hi3): New expander.
	(*mulv2hi3): New insn pattern.
	(one_cmpl<VI_32:mode>2): New expander.
	(*andnot<VI_32:mode>3): New insn pattern.
	(<any_logic:code><VI_32:mode>3): New expander.
	(*<any_logic:code><VI_32:mode>3): New insn pattern.

gcc/testsuite/

	PR target/100637
	* gcc.target/i386/pr100637-1b.c: New test.
	* gcc.target/i386/pr100637-1w.c: Ditto.

	* gcc.target/i386/pr92658-avx2-2.c: Do not XFAIL scan for pmovsxbq.
	* gcc.target/i386/pr92658-avx2.c: Do not XFAIL scan for pmovzxbq.
	* gcc.target/i386/pr92658-avx512vl.c: Do not XFAIL scan for vpmovdb.
	* gcc.target/i386/pr92658-sse4-2.c: Do not XFAIL scan for
	pmovsxbd and pmovsxwq.
	* gcc.target/i386/pr92658-sse4.c: Do not XFAIL scan for
	pmovzxbd and pmovzxwq.

Nothing in gcc or binutils or gdb or anything anywhere uses these.

config/

	* acinclude.m4 (CYG_AC_PATH_SIM, CYG_AC_PATH_DEVO): Delete.

	PR fortran/100642

gcc/fortran/ChangeLog:

	* openmp.c (omp_code_to_statement): Add missing EXEC_OMP_DEPOBJ.

gcc/testsuite/ChangeLog:

	* gfortran.dg/goacc-gomp/depobj.f90: New test.

In the earlier commit r12-854 I forgot to also rewrite the other operator-
overload in terms of the split-out member function _M_distance_from.

libstdc++-v3/ChangeLog:

	PR libstdc++/100631
	* include/std/ranges (elements_view::_Sentinel::operator-): Use
	_M_distance_from in the other operator- overload too.
	* testsuite/std/ranges/adaptors/elements.cc (test06): Augment test.

Fix a mode mismatch.

2021-05-18  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	* config/i386/sse.md (<any_extend:insn>v4qiv4di2):
	Fix a mode mismatch with operand 1.

split_double_mode calls simplify_gen_subreg, which fails for the
high half of the paradoxical subreg.  Return temporary register
instead of NULL RTX in this case.

2021-05-18  Uroš Bizjak  <ubizjak@gmail.com>

gcc/
	PR target/100626
	* config/i386/i386-expand.c (split_double_mode): Return
	temporary register when simplify_gen_subreg fails with
	the high half od the paradoxical subreg.