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  1. Oct 11, 2023
    • Gaius Mulley's avatar
      PR modula2/111675 Incorrect packed record field value passed to a procedure · 2b783fe2
      Gaius Mulley authored
      
      This patch allows a packed field to be extracted and passed to a
      procedure.  It ensures that the subrange type is the same for both the
      procedure and record field.  It also extends the <* bytealignment (0) *>
      to cover packed subrange types.
      
      gcc/m2/ChangeLog:
      
      	PR modula2/111675
      	* gm2-compiler/M2CaseList.mod (appendTree): Replace
      	InitStringCharStar with InitString.
      	* gm2-compiler/M2GCCDeclare.mod: Import AreConstantsEqual.
      	(DeclareSubrange): Add zero alignment test and call
      	BuildSmallestTypeRange if necessary.
      	(WalkSubrangeDependants): Walk the align expression.
      	(IsSubrangeDependants): Test the align expression.
      	* gm2-compiler/M2Quads.mod (BuildStringAdrParam): Correct end name.
      	* gm2-compiler/P2SymBuild.mod (BuildTypeAlignment): Allow subranges
      	to be zero aligned (packed).
      	* gm2-compiler/SymbolTable.mod (Subrange): Add Align field.
      	(MakeSubrange): Set Align to NulSym.
      	(PutAlignment): Assign Subrange.Align to align.
      	(GetAlignment): Return Subrange.Align.
      	* gm2-gcc/m2expr.cc (noBitsRequired): Rewrite.
      	(calcNbits): Rename ...
      	(m2expr_calcNbits): ... to this and test for negative values.
      	(m2expr_BuildTBitSize): Replace calcNBits with m2expr_calcNbits.
      	* gm2-gcc/m2expr.def (calcNbits): Export.
      	* gm2-gcc/m2expr.h (m2expr_calcNbits): New prototype.
      	* gm2-gcc/m2type.cc (noBitsRequired): Remove.
      	(m2type_BuildSmallestTypeRange): Call m2expr_calcNbits.
      	(m2type_BuildSubrangeType): Create range_type from
      	build_range_type (type, lowval, highval).
      
      gcc/testsuite/ChangeLog:
      
      	PR modula2/111675
      	* gm2/extensions/run/pass/packedrecord3.mod: New test.
      
      Signed-off-by: default avatarGaius Mulley <gaiusmod2@gmail.com>
      2b783fe2
    • Juzhe-Zhong's avatar
      RISC-V: Fix incorrect index(offset) of gather/scatter · f6c5e247
      Juzhe-Zhong authored
      I suddenly discovered I made a mistake that was lucky un-exposed.
      
      https://godbolt.org/z/c3jzrh7or
      
      GCC is using 32 bit index offset:
      
              vsll.vi v1,v1,2
              vsetvli zero,a5,e32,m1,ta,ma
              vluxei32.v      v1,(a1),v1
      
      This is wrong since v1 may overflow 32bit after vsll.vi.
      
      After this patch:
      
      vsext.vf2	v8,v4
      vsll.vi	v8,v8,2
      vluxei64.v	v8,(a1),v8
      
      Same as Clang.
      
      Regression passed. Ok for trunk ?
      
      gcc/ChangeLog:
      
      	* config/riscv/autovec.md: Fix index bug.
      	* config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
      	* config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
      	(gather_scatter_valid_offset_mode_p): New function.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.target/riscv/rvv/autovec/gather-scatter/offset_extend-1.c: New test.
      f6c5e247
    • Pan Li's avatar
      RISC-V: Support FP lrint/lrintf auto vectorization · d1e55666
      Pan Li authored
      
      This patch would like to support the FP lrint/lrintf auto vectorization.
      
      * long lrint (double) for rv64
      * long lrintf (float) for rv32
      
      Due to the limitation that only the same size of data type are allowed
      in the vectorier, the standard name lrintmn2 only act on DF => DI for
      rv64, and SF => SI for rv32.
      
      Given we have code like:
      
      void
      test_lrint (long *out, double *in, unsigned count)
      {
        for (unsigned i = 0; i < count; i++)
          out[i] = __builtin_lrint (in[i]);
      }
      
      Before this patch:
      .L3:
        ...
        fld      fa5,0(a1)
        fcvt.l.d a5,fa5,dyn
        sd       a5,-8(a0)
        ...
        bne      a1,a4,.L3
      
      After this patch:
      .L3:
        ...
        vsetvli     a3,zero,e64,m1,ta,ma
        vfcvt.x.f.v v1,v1
        vsetvli     zero,a2,e64,m1,ta,ma
        vse32.v     v1,0(a0)
        ...
        bne         a2,zero,.L3
      
      The rest part like SF => DI/HF => DI/DF => SI/HF => SI will be covered
      by TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION.
      
      gcc/ChangeLog:
      
      	* config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
      	for lrint/lintf.
      	* config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
      	for expanding lint.
      	* config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
      	for vfcvt.x.f.v.
      	(expand_vec_lrint): New function impl for expanding lint.
      	* config/riscv/vector-iterators.md: New mode attr and iterator.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.target/riscv/rvv/autovec/unop/test-math.h: New define for
      	CVT like test case.
      	* gcc.target/riscv/rvv/autovec/vls/def.h: Ditto.
      	* gcc.target/riscv/rvv/autovec/unop/math-lrint-0.c: New test.
      	* gcc.target/riscv/rvv/autovec/unop/math-lrint-1.c: New test.
      	* gcc.target/riscv/rvv/autovec/unop/math-lrint-run-0.c: New test.
      	* gcc.target/riscv/rvv/autovec/unop/math-lrint-run-1.c: New test.
      	* gcc.target/riscv/rvv/autovec/vls/math-lrint-0.c: New test.
      	* gcc.target/riscv/rvv/autovec/vls/math-lrint-1.c: New test.
      
      Signed-off-by: default avatarPan Li <pan2.li@intel.com>
      d1e55666
    • Juzhe-Zhong's avatar
      RISC-V: Remove XFAIL of ssa-dom-cse-2.c · d4de593d
      Juzhe-Zhong authored
      Confirm RISC-V is able to CSE this case no matter whether we enable RVV or not.
      
      Remove XFAIL,  to fix:
      XPASS: gcc.dg/tree-ssa/ssa-dom-cse-2.c scan-tree-dump optimized "return 28;"
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/tree-ssa/ssa-dom-cse-2.c: Remove riscv.
      d4de593d
    • Jakub Jelinek's avatar
      tree-ssa-strlen: optimization skips clobbering store [PR111519] · e75bf198
      Jakub Jelinek authored
      The following testcase is miscompiled, because count_nonzero_bytes incorrectly
      uses get_strinfo information on a pointer from which an earlier instruction
      loads SSA_NAME stored at the current instruction.  get_strinfo shows a state
      right before the current store though, so if there are some stores in between
      the current store and the load, the string length information might have
      changed.
      
      The patch passes around gimple_vuse from the store and punts instead of using
      strinfo on loads from MEM_REF which have different gimple_vuse from that.
      
      2023-10-11  Richard Biener  <rguenther@suse.de>
      	    Jakub Jelinek  <jakub@redhat.com>
      
      	PR tree-optimization/111519
      	* tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
      	argument and pass it through to recursive calls and
      	count_nonzero_bytes_addr calls.  Don't shadow the stmt argument, but
      	change stmt for gimple_assign_single_p statements for which we don't
      	immediately punt.
      	(strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
      	it through to recursive calls and count_nonzero_bytes calls.  Don't
      	use get_strinfo if gimple_vuse (stmt) is different from vuse.  Don't
      	shadow the stmt argument.
      
      	* gcc.dg/torture/pr111519.c: New testcase.
      e75bf198
    • Roger Sayle's avatar
      Optimize (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) as (and:SI x 1). · c4149242
      Roger Sayle authored
      This patch is the middle-end piece of an improvement to PRs 101955 and
      106245, that adds a missing simplification to the RTL optimizers.
      This transformation is to simplify (char)(x << 7) != 0 as x & 1.
      Technically, the cast can be any truncation, where shift is by one
      less than the narrower type's precision, setting the most significant
      (only) bit from the least significant bit.
      
      This transformation applies to any target, but it's easy to see
      (and add a new test case) on x86, where the following function:
      
      int f(int a) { return (a << 31) >> 31; }
      
      currently gets compiled with -O2 to:
      
      foo:    movl    %edi, %eax
              sall    $7, %eax
              sarb    $7, %al
              movsbl  %al, %eax
              ret
      
      but with this patch, we now generate the slightly simpler.
      
      foo:    movl    %edi, %eax
              sall    $31, %eax
              sarl    $31, %eax
              ret
      
      2023-10-11  Roger Sayle  <roger@nextmovesoftware.com>
      
      gcc/ChangeLog
      	PR middle-end/101955
      	PR tree-optimization/106245
      	* simplify-rtx.cc (simplify_relational_operation_1): Simplify
      	the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
      
      gcc/testsuite/ChangeLog
      	* gcc.target/i386/pr106245-1.c: New test case.
      c4149242
    • Juzhe-Zhong's avatar
      RISC-V: Enable full coverage vect tests · 23aabded
      Juzhe-Zhong authored
      I have analyzed all existing FAILs.
      
      Except these following FAILs need to be addressed:
      FAIL: gcc.dg/vect/slp-reduc-7.c -flto -ffat-lto-objects execution test
      FAIL: gcc.dg/vect/slp-reduc-7.c execution test
      FAIL: gcc.dg/vect/vect-cond-arith-2.c -flto -ffat-lto-objects  scan-tree-dump optimized " = \\.COND_(LEN_)?SUB"
      FAIL: gcc.dg/vect/vect-cond-arith-2.c scan-tree-dump optimized " = \\.COND_(LEN_)?SUB"
      
      All other FAILs are dumple fail can be ignored (Confirm ARM SVE also has such FAILs and didn't fix them on either tests or implementation).
      
      Now, It's time to enable full coverage vect tests including vec_unpack, vec_pack, vec_interleave, ... etc.
      
      To see what we are still missing:
      
      Before this patch:
      
                      === gcc Summary ===
      
      # of expected passes            182839
      # of unexpected failures        79
      # of unexpected successes       11
      # of expected failures          1275
      # of unresolved testcases       4
      # of unsupported tests          4223
      
      After this patch:
      
                      === gcc Summary ===
      
      # of expected passes            183411
      # of unexpected failures        93
      # of unexpected successes       7
      # of expected failures          1285
      # of unresolved testcases       4
      # of unsupported tests          4157
      
      There is an important issue increased that I have noticed after this patch:
      
      FAIL: gcc.dg/vect/vect-gather-1.c -flto -ffat-lto-objects  scan-tree-dump vect "Loop contains only SLP stmts"
      FAIL: gcc.dg/vect/vect-gather-1.c scan-tree-dump vect "Loop contains only SLP stmts"
      FAIL: gcc.dg/vect/vect-gather-3.c -flto -ffat-lto-objects  scan-tree-dump vect "Loop contains only SLP stmts"
      FAIL: gcc.dg/vect/vect-gather-3.c scan-tree-dump vect "Loop contains only SLP stmts"
      
      It has a related PR: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111721
      
      I am gonna fix this first in the middle-end after commit this patch.
      
      Ok for trunk ?
      
      gcc/testsuite/ChangeLog:
      
      	* lib/target-supports.exp: Add RVV.
      23aabded
    • liuhongt's avatar
      Refine predicate of operands[2] in divv4hf3 with register_operand. · 4efe9085
      liuhongt authored
      In the expander, it will emit below insn.
      
      rtx tmp = gen_rtx_VEC_CONCAT (V4SFmode, operands[2],
      			force_reg (V2SFmode, CONST1_RTX (V2SFmode)));
      
      but *vec_concat<mode> only allow register_operand.
      
      gcc/ChangeLog:
      
      	PR target/111745
      	* config/i386/mmx.md (divv4hf3): Refine predicate of
      	operands[2] with register_operand.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.target/i386/pr111745.c: New test.
      4efe9085
    • Juzhe-Zhong's avatar
    • Juzhe-Zhong's avatar
      RISC-V Regression: Fix FAIL of vect-multitypes-16.c for RVV · cfe89942
      Juzhe-Zhong authored
      As Richard suggested: https://gcc.gnu.org/pipermail/gcc-patches/2023-October/632288.html
      
      Add vect_ext_char_longlong to fix FAIL for RVV.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/vect/vect-multitypes-16.c: Adapt check for RVV.
      	* lib/target-supports.exp: Add vect_ext_char_longlong property.
      cfe89942
    • GCC Administrator's avatar
      Daily bump. · 69e3072c
      GCC Administrator authored
      69e3072c
  2. Oct 10, 2023
    • Andrew Waterman's avatar
      RISC-V: far-branch: Handle far jumps and branches for functions larger than 1MB · 71f90649
      Andrew Waterman authored
      
      On RISC-V, branches further than +/-1MB require a longer instruction
      sequence (3 instructions): we can reuse the jump-construction in the
      assmbler (which clobbers $ra) and a temporary to set up the jump
      destination.
      
      gcc/ChangeLog:
      
      	* config/riscv/riscv.cc (struct machine_function): Track if a
      	far-branch/jump is used within a function (and $ra needs to be
      	saved).
      	(riscv_print_operand): Implement 'N' (inverse integer branch).
      	(riscv_far_jump_used_p): Implement.
      	(riscv_save_return_addr_reg_p): New function.
      	(riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
      	* config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
      	(CALL_USED_REGISTERS): Update $ra.
      	* config/riscv/riscv.md: Add new types "ret" and "jalr".
      	(length attribute): Handle long conditional and unconditional
      	branches.
      	(conditional branch pattern): Handle case where jump can not
      	reach the intended target.
      	(indirect_jump, tablejump): Use new "jalr" type.
      	(simple_return): Use new "ret" type.
      	(simple_return_internal, eh_return_internal): Likewise.
      	(gpr_restore_return, riscv_mret): Likewise.
      	(riscv_uret, riscv_sret): Likewise.
      	* config/riscv/generic.md (generic_branch): Also recognize jalr & ret
      	types.
      	* config/riscv/sifive-7.md (sifive_7_jump): Likewise.
      
      Co-authored-by: default avatarPhilipp Tomsich <philipp.tomsich@vrull.eu>
      Co-authored-by: default avatarJeff Law <jlaw@ventanamicro.com>
      71f90649
    • Jason Merrill's avatar
      c++: mangle multiple levels of template parms [PR109422] · bd5719bd
      Jason Merrill authored
      This becomes be more important with concepts, but can also be seen with
      generic lambdas.
      
      	PR c++/109422
      
      gcc/cp/ChangeLog:
      
      	* mangle.cc (write_template_param): Also mangle level.
      
      gcc/testsuite/ChangeLog:
      
      	* g++.dg/cpp2a/lambda-generic-mangle1.C: New test.
      	* g++.dg/cpp2a/lambda-generic-mangle1a.C: New test.
      bd5719bd
    • Andrew Pinski's avatar
      MATCH: [PR111679] Add alternative simplification of `a | ((~a) ^ b)` · 975da6fa
      Andrew Pinski authored
      So currently we have a simplification for `a | ~(a ^ b)` but
      that does not match the case where we had originally `(~a) | (a ^ b)`
      so we need to add a new pattern that matches that and uses bitwise_inverted_equal_p
      that also catches comparisons too.
      
      OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
      
      	PR tree-optimization/111679
      
      gcc/ChangeLog:
      
      	* match.pd (`a | ((~a) ^ b)`): New pattern.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/tree-ssa/bitops-5.c: New test.
      975da6fa
    • Juzhe-Zhong's avatar
      RISC-V Regression: Make match patterns more accurate · 5bb6a876
      Juzhe-Zhong authored
      This patch fixes following 2 FAILs in RVV regression since the check is not accurate.
      
      It's inspired by Robin's previous patch:
      https://patchwork.sourceware.org/project/gcc/patch/dde89b9e-49a0-d70b-0906-fb3022cac11b@gmail.com/
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/vect/no-scevccp-outer-7.c: Adjust regex pattern.
      	* gcc.dg/vect/no-scevccp-vect-iv-3.c: Ditto.
      5bb6a876
    • Juzhe-Zhong's avatar
      RISC-V Regression: Fix FAIL of predcom-2.c · 0b0fcb27
      Juzhe-Zhong authored
      Like GCN, add -fno-tree-vectorize.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/tree-ssa/predcom-2.c: Add riscv.
      0b0fcb27
    • Juzhe-Zhong's avatar
      RISC-V Regression: Fix FAIL of pr65947-8.c for RVV · 8a361405
      Juzhe-Zhong authored
      This test is testing fold_extract_last pattern so it's more reasonable use
      vect_fold_extract_last instead of specifying targets.
      
      This is the vect_fold_extract_last property:
      proc check_effective_target_vect_fold_extract_last { } {
          return [expr { [check_effective_target_aarch64_sve]
      		   || [istarget amdgcn*-*-*]
      		   || [check_effective_target_riscv_v] }]
      }
      
      include ARM SVE/GCN/RVV.
      
      It perfectly matches what we want and more reasonable, better maintainment.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/vect/pr65947-8.c: Use vect_fold_extract_last.
      8a361405
    • Christoph Müllner's avatar
      MAINTAINERS: Add myself to write after approval · ddf17b6d
      Christoph Müllner authored
      
      Signed-off-by: default avatarChristoph Müllner <christoph.muellner@vrull.eu>
      
      ChangeLog:
      
      	* MAINTAINERS: Add myself.
      ddf17b6d
    • Juzhe-Zhong's avatar
      RISC-V: Add VLS BOOL mode vcond_mask[PR111751] · 5255273e
      Juzhe-Zhong authored
      Richard patch resolve PR111751: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=7c76c876e917a1f20a788f602cc78fff7d0a2a65
      
      which cause ICE in RISC-V regression:
      
      FAIL: gcc.dg/torture/pr53144.c   -O2  (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
      FAIL: gcc.dg/torture/pr53144.c   -O2  (test for excess errors)
      FAIL: gcc.dg/torture/pr53144.c   -O2 -flto -fno-use-linker-plugin -flto-partition=none  (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
      FAIL: gcc.dg/torture/pr53144.c   -O2 -flto -fno-use-linker-plugin -flto-partition=none  (test for excess errors)
      FAIL: gcc.dg/torture/pr53144.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
      FAIL: gcc.dg/torture/pr53144.c   -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions  (test for excess errors)
      FAIL: gcc.dg/torture/pr53144.c   -O3 -g  (internal compiler error: in gimple_expand_vec_cond_expr, at gimple-isel.cc:328)
      FAIL: gcc.dg/torture/pr53144.c   -O3 -g  (test for excess errors)
      
      VLS BOOL modes vcond_mask is needed to fix this regression ICE.
      
      More details: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111751
      
      Tested and Committed.
      
      	PR target/111751
      
      gcc/ChangeLog:
      
      	* config/riscv/autovec.md: Add VLS BOOL modes.
      5255273e
    • Richard Biener's avatar
      tree-optimization/111751 - support 1024 bit vector constant reinterpretation · 70b5c698
      Richard Biener authored
      The following ups the limit in fold_view_convert_expr to handle
      1024bit vectors as used by GCN and RVV.  It also robustifies
      the handling in visit_reference_op_load to properly give up when
      constants cannot be re-interpreted.
      
      	PR tree-optimization/111751
      	* fold-const.cc (fold_view_convert_expr): Up the buffer size
      	to 128 bytes.
      	* tree-ssa-sccvn.cc (visit_reference_op_load): Special case
      	constants, giving up when re-interpretation to the target type
      	fails.
      70b5c698
    • Eric Botcazou's avatar
      ada: Fix internal error on too large representation clause for small component · 2f150833
      Eric Botcazou authored
      This is a small bug present on strict-alignment platforms for questionable
      representation clauses.
      
      gcc/ada/
      
      	* gcc-interface/decl.cc (inline_status_for_subprog): Minor tweak.
      	(gnat_to_gnu_field): Try harder to get a packable form of the type
      	for a bitfield.
      2f150833
    • Ronan Desplanques's avatar
      ada: Tweak internal subprogram in Ada.Directories · 42c46cfe
      Ronan Desplanques authored
      The purpose of this patch is to work around false-positive warnings
      emitted by GNAT SAS (also known as CodePeer). It does not change
      the behavior of the modified subprogram.
      
      gcc/ada/
      
      	* libgnat/a-direct.adb (Start_Search_Internal): Tweak subprogram
      	body.
      42c46cfe
    • Eric Botcazou's avatar
      ada: Remove superfluous setter procedure · 25c253e6
      Eric Botcazou authored
      It is only called once.
      
      gcc/ada/
      
      	* sem_util.ads (Set_Scope_Is_Transient): Delete.
      	* sem_util.adb (Set_Scope_Is_Transient): Likewise.
      	* exp_ch7.adb (Create_Transient_Scope): Set Is_Transient directly.
      25c253e6
    • Eric Botcazou's avatar
      ada: Fix bad finalization of limited aggregate in conditional expression · e05e5d6b
      Eric Botcazou authored
      This happens when the conditional expression is immediately returned, for
      example in an expression function.
      
      gcc/ada/
      
      	* exp_aggr.adb (Is_Build_In_Place_Aggregate_Return): Return true
      	if the aggregate is a dependent expression of a conditional
      	expression being returned from a build-in-place function.
      e05e5d6b
    • Eric Botcazou's avatar
      ada: Fix infinite loop with multiple limited with clauses · 6bd83c90
      Eric Botcazou authored
      This occurs when one of the types has an incomplete declaration in addition
      to its full declaration in its package. In this case AI05-129 says that the
      incomplete type is not part of the limited view of the package, i.e. only
      the full view is. Now, in the GNAT implementation, it's the opposite in the
      regular view of the package, i.e. the incomplete type is the visible one.
      
      That's why the implementation needs to also swap the types on the visibility
      chain while it is swapping the views when the clauses are either installed
      or removed. This works correctly for the installation, but does not for the
      removal, so this change rewrites the code doing the latter.
      
      gcc/ada/
      	PR ada/111434
      	* sem_ch10.adb (Replace): New procedure to replace an entity with
      	another on the homonym chain.
      	(Install_Limited_With_Clause): Rename Non_Lim_View to Typ for the
      	sake of consistency.  Call Replace to do the replacements and split
      	the code into the regular and the special cases.  Add debuggging
      	output controlled by -gnatdi.
      	(Install_With_Clause): Print the Parent_With and Implicit_With flags
      	in the debugging output controlled by -gnatdi.
      	(Remove_Limited_With_Unit.Restore_Chain_For_Shadow (Shadow)): Rewrite
      	using a direct replacement of E4 by E2.   Call Replace to do the
      	replacements.  Add debuggging output controlled by -gnatdi.
      6bd83c90
    • Ronan Desplanques's avatar
      ada: Fix filesystem entry filtering · 34992e15
      Ronan Desplanques authored
      This patch fixes the behavior of Ada.Directories.Search when being
      requested to filter out regular files or directories. One of the
      configurations in which that behavior was incorrect was that when the
      caller requested only the regular and special files but not the
      directories, the directories would still be returned.
      
      gcc/ada/
      
      	* libgnat/a-direct.adb: Fix filesystem entry filtering.
      34992e15
    • Ronan Desplanques's avatar
      ada: Tweak documentation comments · f71c6312
      Ronan Desplanques authored
      The concept of extended nodes was retired at the same time Gen_IL
      was introduced, but there was a reference to that concept left over
      in a comment. This patch removes that reference.
      
      Also, the description of the field Comes_From_Check_Or_Contract was
      incorrectly placed in a section for fields present in all nodes in
      sinfo.ads. This patch fixes this.
      
      gcc/ada/
      
      	* atree.ads, nlists.ads, types.ads: Remove references to extended
      	nodes. Fix typo.
      	* sinfo.ads: Likewise and fix position of
      	Comes_From_Check_Or_Contract description.
      f71c6312
    • Javier Miranda's avatar
      ada: Crash processing pragmas Compile_Time_Error and Compile_Time_Warning · 85a0ce90
      Javier Miranda authored
      gcc/ada/
      
      	* sem_attr.adb (Analyze_Attribute): Protect the frontend against
      	replacing 'Size by its static value if 'Size is not known at
      	compile time and we are processing pragmas Compile_Time_Warning or
      	Compile_Time_Errors.
      85a0ce90
    • Juzhe-Zhong's avatar
      RISC-V: Add testcase for SCCVN optimization[PR111751] · a704603d
      Juzhe-Zhong authored
      Add testcase for PR111751 which has been fixed:
      https://gcc.gnu.org/pipermail/gcc-patches/2023-October/632474.html
      
      	PR target/111751
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.target/riscv/rvv/autovec/pr111751.c: New test.
      a704603d
    • Richard Biener's avatar
      Fix missed CSE with a BLKmode entity · 7c76c876
      Richard Biener authored
      The following fixes fallout of r10-7145-g1dc00a8ec9aeba which made
      us cautionous about CSEing a load to an object that has padding bits.
      The added check also triggers for BLKmode entities like STRING_CSTs
      but by definition a BLKmode entity does not have padding bits.
      
      	PR tree-optimization/111751
      	* tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
      	BLKmode result from the padding bits check.
      7c76c876
    • Juzhe-Zhong's avatar
      RISC-V Regression: Fix FAIL of bb-slp-pr65935.c for RVV · 4d230493
      Juzhe-Zhong authored
      Here is the reference comparing dump IR between ARM SVE and RVV.
      
      https://godbolt.org/z/zqess8Gss
      
      We can see RVV has one more dump IR:
      optimized: basic block part vectorized using 128 byte vectors
      since RVV has 1024 bit vectors.
      
      The codegen is reasonable good.
      
      However, I saw GCN also has 1024 bit vector.
      This patch may cause this case FAIL in GCN port ?
      
      Hi, GCN folk, could you check this patch in GCN port for me ?
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/vect/bb-slp-pr65935.c: Add vect1024 variant.
      	* lib/target-supports.exp: Ditto.
      4d230493
    • Claudiu Zissulescu's avatar
      arc: Refurbish add.f combiner patterns · aaa5a531
      Claudiu Zissulescu authored
      
      Refurbish add compare patterns: use 'r' constraint, fix identation,
      and fix pattern to match 'if (a+b) { ... }' constructions.
      
      gcc/
      
      	* config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
      	the first operand.
      	* config/arc/arc.md (addsi_compare): Make pattern canonical.
      	(addsi_compare_2): Fix identation, constraint letters.
      	(addsi_compare_3): Likewise.
      
      gcc/testsuite/
      
      	* gcc.target/arc/add_f-combine.c: New test.
      
      Signed-off-by: default avatarClaudiu Zissulescu <claziss@gmail.com>
      aaa5a531
    • Juzhe-Zhong's avatar
      RISC-V: Add available vector size for RVV · 4ecb9b03
      Juzhe-Zhong authored
      For RVV, we have VLS modes enable according to TARGET_MIN_VLEN
      from M1 to M8.
      
      For example, when TARGET_MIN_VLEN = 128 bits, we enable
      128/256/512/1024 bits VLS modes.
      
      This patch fixes following FAIL:
      FAIL: gcc.dg/vect/bb-slp-subgroups-2.c -flto -ffat-lto-objects  scan-tree-dump-times slp2 "optimized: basic block" 2
      FAIL: gcc.dg/vect/bb-slp-subgroups-2.c scan-tree-dump-times slp2 "optimized: basic block" 2
      
      gcc/testsuite/ChangeLog:
      
      	* lib/target-supports.exp: Add 256/512/1024
      4ecb9b03
    • GCC Administrator's avatar
      Daily bump. · fb124f2a
      GCC Administrator authored
      fb124f2a
  3. Oct 09, 2023
    • Eugene Rozenfeld's avatar
      Fixes for profile count/probability maintenance · cc503372
      Eugene Rozenfeld authored
      Verifier checks have recently been strengthened to check that
      all counts and probabilities are initialized. The checks fired
      during autoprofiledbootstrap build and this patch fixes it.
      
      Tested on x86_64-pc-linux-gnu.
      
      gcc/ChangeLog:
      	* auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
      	* tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
      	when scaling loop profile
      cc503372
    • David Malcolm's avatar
      analyzer: fix build with gcc < 6 · 08d0f840
      David Malcolm authored
      
      gcc/analyzer/ChangeLog:
      	* access-diagram.cc (boundaries::add): Explicitly state
      	"boundaries::" scope for "kind" enum.
      
      Signed-off-by: default avatarDavid Malcolm <dmalcolm@redhat.com>
      08d0f840
    • Andrew MacLeod's avatar
      Ensure float equivalences include + and - zero. · b0892b1f
      Andrew MacLeod authored
      A floating point equivalence may not properly reflect both signs of
      zero, so be pessimsitic and ensure both signs are included.
      
      	PR tree-optimization/111694
      	gcc/
      	* gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
      	equivalence range.
      	* value-relation.cc (adjust_equivalence_range): New.
      	* value-relation.h (adjust_equivalence_range): New prototype.
      
      	gcc/testsuite/
      	* gcc.dg/pr111694.c: New.
      b0892b1f
    • Andrew MacLeod's avatar
      Remove unused get_identity_relation. · 5ee51119
      Andrew MacLeod authored
      Turns out we didnt need this as there is no unordered relations
      managed by the oracle.
      
      	* gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
      	not call get_identity_relation.
      	(gori_compute::compute_operand2_range): Ditto.
      	* value-relation.cc (get_identity_relation): Remove.
      	* value-relation.h (get_identity_relation): Remove protyotype.
      5ee51119
    • Juzhe-Zhong's avatar
      RISC-V Regression test: Fix slp-perm-4.c FAIL for RVV · dae21448
      Juzhe-Zhong authored
      RVV vectorize it with stride5 load_lanes.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/vect/slp-perm-4.c: Adapt test for stride5 load_lanes.
      dae21448
    • Juzhe-Zhong's avatar
      RISC-V Regression tests: Fix FAIL of pr97832* for RVV · e90eddde
      Juzhe-Zhong authored
      These cases are vectorized by vec_load_lanes with strided = 8 instead of SLP
      with -fno-vect-cost-model.
      
      gcc/testsuite/ChangeLog:
      
      	* gcc.dg/vect/pr97832-2.c: Adapt dump check for target supports load_lanes with stride = 8.
      	* gcc.dg/vect/pr97832-3.c: Ditto.
      	* gcc.dg/vect/pr97832-4.c: Ditto.
      e90eddde
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